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release 6.14.4

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This commit is contained in:
Konstantin Demin
2025-04-26 01:02:31 +03:00
parent f2e779751a
commit 23be27fbba
43 changed files with 497 additions and 637 deletions
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2
debian/patches/patchset-zen/invlpgb/0004-x86-mm-Add-INVLPGB-feature-and-Kconfig-entry.patch vendored
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@@ -90,7 +90,7 @@ Link: https://lore.kernel.org/r/20250226030129.530345-3-riel@surriel.com
static inline int rdmsrl_amd_safe(unsigned msr, unsigned long long *p)
{
u32 gprs[8] = { 0 };
@@ -1140,6 +1142,10 @@ static void cpu_detect_tlb_amd(struct cp
@@ -1145,6 +1147,10 @@ static void cpu_detect_tlb_amd(struct cp
tlb_lli_2m[ENTRIES] = eax & mask;
tlb_lli_4m[ENTRIES] = tlb_lli_2m[ENTRIES] >> 1;

2
debian/patches/patchset-zen/invlpgb/0012-x86-mm-Enable-AMD-translation-cache-extensions.patch vendored
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@@ -52,7 +52,7 @@ Link: https://lore.kernel.org/r/20250226030129.530345-13-riel@surriel.com
/*
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -1076,6 +1076,10 @@ static void init_amd(struct cpuinfo_x86
@@ -1081,6 +1081,10 @@ static void init_amd(struct cpuinfo_x86
/* AMD CPUs don't need fencing after x2APIC/TSC_DEADLINE MSR writes. */
clear_cpu_cap(c, X86_FEATURE_APIC_MSRS_FENCE);