49 lines
2.0 KiB
Diff
49 lines
2.0 KiB
Diff
commit 50e1e417b5cc68a6fd280e0a67c5c4eba524b70b
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Author: Richard Sandiford <richard.sandiford@arm.com>
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Date: Sun Mar 22 18:51:48 2020 +0000
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rs6000: Allow FPRs to change between SDmode and DDmode [PR94254]
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g:497498c878d48754318e486428e2aa30854020b9 caused lra to cycle
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on some SDmode reloads for power6. As explained in more detail
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in the PR comments, the problem was a conflict between two target
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hooks: rs6000_secondary_memory_needed_mode required SDmode FPR
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reloads to use DDmode memory (rightly, since using SDmode memory
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wouldn't make progress) but rs6000_can_change_mode_class didn't
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allow FPRs to change from SDmode to DDmode. Previously lra
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ignored that and changed the mode anyway.
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From what Segher says, it sounds like the "from_size < 8 || to_size < 8"
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check is mostly there for SF<->64-bit subregs, and that SDmode is stored
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in the way that target-independent code expects. This patch therefore
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allows SD<->DD changes.
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I wondered about checking for SD<->64-bit changes instead, but that
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seemed like an unnecessary generalisation for this stage.
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2020-03-23 Richard Sandiford <richard.sandiford@arm.com>
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gcc/
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PR target/94254
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* config/rs6000/rs6000.c (rs6000_can_change_mode_class): Allow
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FPRs to change between SDmode and DDmode.
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--- a/src/gcc/config/rs6000/rs6000.cc
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+++ b/src/gcc/config/rs6000/rs6000.cc
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@@ -13668,6 +13668,15 @@ rs6000_can_change_mode_class (machine_mo
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|| (to == SDmode && from == DDmode))
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return true;
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+ /* Allow SD<->DD changes, since SDmode values are stored in
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+ the low half of the DDmode, just like target-independent
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+ code expects. We need to allow at least SD->DD since
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+ rs6000_secondary_memory_needed_mode asks for that change
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+ to be made for SD reloads. */
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+ if ((to == DDmode && from == SDmode)
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+ || (to == SDmode && from == DDmode))
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+ return true;
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+
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if (from_size < 8 || to_size < 8)
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return false;
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