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Konstantin Demin e7e0fc078c sync with Debian 
version: 14.3.0-7 (UNRELEASED)
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# DP: updates from the 14 branch upto 20250829 (591d04b6db9).
LANG=C git diff --no-renames --src-prefix=a/src/ --dst-prefix=b/src/ \
c9cd41fba9ebd288c4f101e4b99da934bcb96a11 591d04b6db957715fd88e9ebf5be4d96a5bc2caa \
| awk '/^diff .*\.texi/ {skip=1; next} /^diff / { skip=0 } skip==0' \
| grep -v -E '^(diff|index)'
--- a/src/gcc/ChangeLog
+++ b/src/gcc/ChangeLog
@@ -1,3 +1,544 @@
+2025-08-20 Martin Jambor <mjambor@suse.cz>
+
+ Backported from master:
+ 2025-07-23 Martin Jambor <mjambor@suse.cz>
+
+ PR tree-optimization/119085
+ * tree-sra.cc (sort_and_splice_var_accesses): Prevent total
+ scalarization if two incompatible aggregates access the same place.
+
+2025-08-20 Martin Jambor <mjambor@suse.cz>
+
+ Backported from master:
+ 2025-07-18 Martin Jambor <mjambor@suse.cz>
+
+ PR tree-optimization/117423
+ * tree-sra.cc (analyze_access_subtree): Fix computation of grp_covered
+ flag.
+
+2025-08-20 Georg-Johann Lay <avr@gjlay.de>
+
+ Backported from master:
+ 2025-08-20 Georg-Johann Lay <avr@gjlay.de>
+
+ PR target/121608
+ * config/avr/specs.h (LINK_RELAX_SPEC): Wrap in %{!r...}.
+
+2025-08-18 Richard Sandiford <richard.sandiford@arm.com>
+
+ Backported from master:
+ 2025-08-18 Richard Sandiford <richard.sandiford@arm.com>
+
+ PR target/121118
+ * config/aarch64/aarch64.cc (aarch64_sve_move_pred_via_while):
+ Return a VNx16BI predicate.
+
+2025-08-18 Richard Sandiford <richard.sandiford@arm.com>
+
+ Backported from master:
+ 2025-08-12 Richard Sandiford <richard.sandiford@arm.com>
+
+ PR rtl-optimization/121253
+ * fwprop.cc (forward_propagate_into): Don't propagate asm defs.
+
+2025-08-15 Pengfei Li <Pengfei.Li2@arm.com>
+
+ PR target/121449
+ * config/aarch64/aarch64-sve.md
+ (mask_gather_load<mode><v_int_container>): Use vg<Vesize>
+ constraints for alternatives with immediate offset.
+ (mask_scatter_store<mode><v_int_container>): Likewise.
+
+2025-08-15 Richard Sandiford <richard.sandiford@arm.com>
+
+ Backported from master:
+ 2025-07-17 Richard Sandiford <richard.sandiford@arm.com>
+ Yury Khrustalev <yury.khrustalev@arm.com>
+
+ * doc/sourcebuild.texi (aarch64_sme_hw): Document.
+
+2025-08-15 Lulu Cheng <chenglulu@loongson.cn>
+
+ Backported from master:
+ 2025-08-15 Lulu Cheng <chenglulu@loongson.cn>
+
+ PR target/121542
+ * config/loongarch/loongarch.cc
+ (loongarch_vector_costs::add_stmt_cost): When using vectype,
+ first determine whether it is NULL.
+
+2025-08-14 Richard Sandiford <richard.sandiford@arm.com>
+
+ Backported from master:
+ 2025-08-14 Richard Sandiford <richard.sandiford@arm.com>
+
+ PR target/121414
+ * config/aarch64/aarch64.cc (aarch64_is_variant_pcs): New function,
+ split out from...
+ (aarch64_asm_output_variant_pcs): ...here. Handle various types
+ of SME function type.
+
+2025-08-14 Richard Sandiford <richard.sandiford@arm.com>
+
+ Backported from master:
+ 2025-08-14 Richard Sandiford <richard.sandiford@arm.com>
+
+ PR target/121294
+ * config/aarch64/aarch64.md (UNSPEC_REV_PRED): New unspec.
+ * config/aarch64/aarch64-sve.md (@aarch64_sve_rev<mode>_acle)
+ (*aarch64_sve_rev<mode>_acle): New patterns.
+ * config/aarch64/aarch64-sve-builtins-base.cc
+ (svrev_impl::expand): Use the new patterns for boolean svrev.
+
+2025-08-14 Richard Sandiford <richard.sandiford@arm.com>
+
+ Backported from master:
+ 2025-08-14 Richard Sandiford <richard.sandiford@arm.com>
+
+ PR target/121294
+ * config/aarch64/iterators.md (UNSPEC_TRN1_CONV): Delete.
+ (UNSPEC_PERMUTE_PRED): New unspec.
+ * config/aarch64/aarch64-sve.md (@aarch64_sve_trn1_conv<mode>):
+ Replace with...
+ (@aarch64_sve_<perm_insn><mode>_acle)
+ (*aarch64_sve_<perm_insn><mode>_acle): ...these new patterns.
+ * config/aarch64/aarch64.cc (aarch64_expand_sve_const_pred_trn):
+ Update accordingly.
+ * config/aarch64/aarch64-sve-builtins-functions.h
+ (binary_permute::expand): Use the new _acle patterns for
+ predicate operations.
+
+2025-08-14 H.J. Lu <hjl.tools@gmail.com>
+
+ Backported from master:
+ 2025-07-28 H.J. Lu <hjl.tools@gmail.com>
+
+ PR target/121208
+ * config/i386/i386.cc (ix86_tls_get_addr): Issue an error for
+ -mtls-dialect=gnu with no_caller_saved_registers attribute and
+ suggest -mtls-dialect=gnu2.
+
+2025-08-13 Lulu Cheng <chenglulu@loongson.cn>
+
+ Backported from master:
+ 2025-08-13 Lulu Cheng <chenglulu@loongson.cn>
+
+ PR target/120476
+ * config/loongarch/loongarch.cc
+ (loongarch_compute_pressure_classes): New function.
+ (TARGET_COMPUTE_PRESSURE_CLASSES): Define.
+
+2025-08-12 mengqinggang <mengqinggang@loongson.cn>
+
+ Backported from master:
+ 2025-08-12 mengqinggang <mengqinggang@loongson.cn>
+
+ * config/loongarch/loongarch-def.h (ABI_BASE_LP64D): New macro.
+ (ABI_BASE_LP64F): New macro.
+ (ABI_BASE_LP64S): New macro.
+ (N_ABI_BASE_TYPES): New macro.
+
+2025-08-08 Jakub Jelinek <jakub@redhat.com>
+
+ Backported from master:
+ 2025-08-06 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/121413
+ * gimple-lower-bitint.cc (abi_limb_prec): New variable
+ (bitint_precision_kind): Initialize it.
+ (gimple_lower_bitint): Clear it at the start. For
+ min_prec > limb_prec descreased precision vars for
+ INTEGER_CST PHI arguments ensure min_prec is either
+ prec or multiple of abi_limb_prec.
+
+2025-08-08 Jakub Jelinek <jakub@redhat.com>
+
+ Backported from master:
+ 2025-08-06 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/121127
+ * gimple-lower-bitint.cc (bitint_large_huge::handle_operand_addr): For
+ uninitialized SSA_NAME, set *prec_stored to 0 rather than *prec.
+ Handle that case in narrowing casts. If prec_stored is non-NULL,
+ set *prec_stored to prec_stored_val.
+
+2025-08-08 Jakub Jelinek <jakub@redhat.com>
+
+ Backported from master:
+ 2025-08-01 Jakub Jelinek <jakub@redhat.com>
+
+ PR middle-end/121322
+ * gimple-ssa-store-merging.cc (find_bswap_or_nop): Return NULL if
+ count is 0.
+
+2025-07-31 Spencer Abson <spencer.abson@arm.com>
+
+ Backported from master:
+ 2025-07-31 Spencer Abson <spencer.abson@arm.com>
+
+ PR target/121028
+ * config/aarch64/aarch64-sme.md (aarch64_smstart_sm): Use the .inst
+ directive if !TARGET_SME.
+ (aarch64_smstop_sm): Likewise.
+
+2025-07-31 H.J. Lu <hjl.tools@gmail.com>
+
+ Backported from master:
+ 2025-07-30 H.J. Lu <hjl.tools@gmail.com>
+
+ PR target/120427
+ * config/i386/i386.md (peephole2): Transform "movq $-1,reg" to
+ "pushq $-1; popq reg" for -Oz if reg is a legacy integer register.
+
+2025-07-31 liuhongt <hongtao.liu@intel.com>
+
+ Backported from master:
+ 2025-07-30 liuhongt <hongtao.liu@intel.com>
+
+ PR target/121274
+ * config/i386/sse.md (*vec_concatv2di_0): Add a splitter
+ before it.
+
+2025-07-29 H.J. Lu <hjl.tools@gmail.com>
+
+ Backported from master:
+ 2025-06-19 H.J. Lu <hjl.tools@gmail.com>
+
+ PR target/120427
+ * config/i386/i386.md (*mov<mode>_and): Changed to
+ define_insn_and_split. Split it to "mov $0,mem" if not -Oz.
+ (*mov<mode>_or): Changed to define_insn_and_split. Split it
+ to "mov $-1,mem" if not -Oz.
+ (peephole2): Don't transform "mov $-1,reg" to "push $-1; pop reg"
+ for -Oz since it will be transformed to "or $-1,reg".
+
+2025-07-28 Xi Ruoyao <xry111@xry111.site>
+
+ Backported from master:
+ 2025-07-17 Xi Ruoyao <xry111@xry111.site>
+
+ PR target/121064
+ * config/loongarch/lsx.md (lsx_vshuf_<lsxfmt_f>): Add '@' to
+ generate a mode-aware helper. Use <VIMODE> as the mode of the
+ operand 1 (selector).
+ * config/loongarch/lasx.md (lasx_xvshuf_<lasxfmt_f>): Likewise.
+ * config/loongarch/loongarch.cc
+ (loongarch_try_expand_lsx_vshuf_const): Create a new pseudo for
+ the selector. Use the mode-aware helper to simplify the code.
+ (loongarch_expand_vec_perm_const): Likewise.
+
+2025-07-26 Richard Sandiford <richard.sandiford@arm.com>
+
+ Backported from master:
+ 2025-07-11 Richard Sandiford <richard.sandiford@arm.com>
+
+ PR target/121027
+ * config/aarch64/aarch64.cc (aarch64_evpc_sve_tbl): Punt on 2-input
+ operations that can be handled by vec_perm.
+
+2025-07-26 Richard Sandiford <richard.sandiford@arm.com>
+
+ Backported from master:
+ 2024-10-07 Richard Sandiford <richard.sandiford@arm.com>
+
+ PR target/121027
+ * config/aarch64/iterators.md (SVE_I): Move further up file.
+ (SVE_F): New mode iterator.
+ (SVE_ALL): Redefine in terms of SVE_I and SVE_F.
+ * config/aarch64/aarch64-sve.md (*<LOGICALF:optab><mode>3): Extend
+ to all SVE_F.
+
+2025-07-26 Richard Sandiford <richard.sandiford@arm.com>
+
+ Backported from master:
+ 2025-07-07 Richard Sandiford <richard.sandiford@arm.com>
+
+ PR target/118891
+ * config/aarch64/aarch64.cc (aarch64_expand_vector_init): Fix the
+ ZIP1 operand order for big-endian targets.
+
+2025-07-26 Richard Sandiford <richard.sandiford@arm.com>
+
+ Backported from master:
+ 2025-07-07 Richard Sandiford <richard.sandiford@arm.com>
+
+ * config/aarch64/aarch64-sve.md (@aarch64_sve_set_neonq_<mode>):
+ Use %Z instead of lowpart_subreg. Tweak formatting.
+
+2025-07-26 Richard Sandiford <richard.sandiford@arm.com>
+
+ Backported from master:
+ 2025-07-07 Richard Sandiford <richard.sandiford@arm.com>
+
+ PR tree-optimization/118891
+ * tree-vect-stmts.cc (supportable_widening_operation): Swap the
+ hi and lo internal functions on big-endian targets.
+
+2025-07-22 Haochen Gui <guihaoc@gcc.gnu.org>
+
+ Backported from master:
+ 2024-08-15 Haochen Gui <guihaoc@gcc.gnu.org>
+
+ * config/rs6000/rs6000.md (floatti<mode>2, floatunsti<mode>2,
+ fix_trunc<mode>ti2): Add guard TARGET_FLOAT128_HW.
+ * config/rs6000/vsx.md (xsxexpqp_<IEEE128:mode>_<V2DI_DI:mode>,
+ xsxsigqp_<IEEE128:mode>_<VEC_TI:mode>, xsiexpqpf_<mode>,
+ xsiexpqp_<IEEE128:mode>_<V2DI_DI:mode>, xscmpexpqp_<code>_<mode>,
+ *xscmpexpqp, xststdcnegqp_<mode>): Replace guard TARGET_P9_VECTOR
+ with TARGET_FLOAT128_HW.
+
+2025-07-18 Jakub Jelinek <jakub@redhat.com>
+
+ Backported from master:
+ 2025-07-18 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/121131
+ * gimple-fold.cc (fold_nonarray_ctor_reference): Use
+ TREE_INT_CST_LOW (TYPE_SIZE ()) instead of
+ GET_MODE_BITSIZE (SCALAR_INT_TYPE_MODE ()) for BLKmode BITINT_TYPEs.
+ Don't compute encoding_size at all for little endian targets.
+
+2025-07-17 H.J. Lu <hjl.tools@gmail.com>
+
+ Backported from master:
+ 2025-07-03 H.J. Lu <hjl.tools@gmail.com>
+
+ PR target/120908
+ * config/i386/i386.cc (legitimize_tls_address): Pass RDI to
+ gen_tls_local_dynamic_64.
+ * config/i386/i386.md (*tls_global_dynamic_64_largepic): Add
+ RDI clobber and use it to generate LEA.
+ (*tls_local_dynamic_64_<mode>): Likewise.
+ (*tls_local_dynamic_base_64_largepic): Likewise.
+ (@tls_local_dynamic_64_<mode>): Add a clobber.
+
+2025-07-17 H.J. Lu <hjl.tools@gmail.com>
+
+ Backported from master:
+ 2025-07-02 H.J. Lu <hjl.tools@gmail.com>
+
+ PR target/120908
+ * config/i386/i386.cc (legitimize_tls_address): Pass RDI to
+ gen_tls_global_dynamic_64.
+ * config/i386/i386.md (*tls_global_dynamic_64_<mode>): Add RDI
+ clobber and use it to generate LEA.
+ (@tls_global_dynamic_64_<mode>): Add a clobber.
+
+2025-07-14 Haochen Jiang <haochen.jiang@intel.com>
+
+ * config/i386/i386.h (PTA_PANTHERLAKE): Revmoe KL and WIDEKL.
+ (PTA_CLEARWATERFOREST): Ditto.
+ * doc/invoke.texi: Revise documentation.
+
+2025-07-06 Georg-Johann Lay <avr@gjlay.de>
+
+ * config/avr/avr-mcus.def (avr32da28s, avr32da32s, avr32da48s)
+ (avr64da28s, avr64da32s, avr64da48s avr64da64s)
+ (avr128da28s, avr128da32s, avr128da48s, avr128da64s): Add devices.
+ * doc/avr-mmcu.texi: Rebuild.
+
+2025-07-03 Richard Sandiford <richard.sandiford@arm.com>
+
+ Backported from master:
+ 2025-06-12 Richard Sandiford <richard.sandiford@arm.com>
+
+ PR target/120624
+ * config/aarch64/aarch64.md (SME_STATE_REGNUM): Expand on comments.
+ * config/aarch64/aarch64-sme.md (aarch64_restore_za): Also set
+ SME_STATE_REGNUM
+
+2025-06-27 Eric Botcazou <ebotcazou@adacore.com>
+
+ * gimple-fold.cc (fold_const_aggregate_ref_1) <COMPONENT_REF>:
+ Bail out immediately if the reference has reverse storage order.
+ * tree-ssa-sccvn.cc (fully_constant_vn_reference_p): Likewise.
+
+2025-06-25 Haochen Jiang <haochen.jiang@intel.com>
+
+ * config/i386/i386.h (PTA_ALDERLAKE): Use PTA_GOLDMONT_PLUS
+ as base to remove PTA_CLDEMOTE.
+ (PTA_SIERRAFOREST): Add PTA_CLDEMOTE since PTA_ALDERLAKE
+ does not include that anymore.
+ * doc/invoke.texi: Update texi file.
+
+2025-06-20 Richard Biener <rguenther@suse.de>
+
+ Backported from master:
+ 2024-09-11 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/116674
+ * tree-vect-stmts.cc (vectorizable_simd_clone_call): Support
+ re-analysis.
+
+2025-06-19 Jakub Jelinek <jakub@redhat.com>
+
+ Backported from master:
+ 2025-06-19 Jakub Jelinek <jakub@redhat.com>
+
+ PR middle-end/120631
+ * dfp.cc (decimal_real_to_integer): Use result multiplication not just
+ when precision > 128 and dn.exponent > 19, but when precision > 64
+ and dn.exponent > 0.
+
+2025-06-19 Jakub Jelinek <jakub@redhat.com>
+
+ Backported from master:
+ 2025-06-18 Jakub Jelinek <jakub@redhat.com>
+
+ PR middle-end/120631
+ * real.cc (decimal_from_integer): Add digits argument, if larger than
+ 256, use XALLOCAVEC allocated buffer.
+ (real_from_integer): Pass val_in's precision divided by 3 to
+ decimal_from_integer.
+ * dfp.cc (decimal_real_to_integer): For precision > 128 if finite
+ and exponent is large, decrease exponent and multiply resulting
+ wide_int by powers of 10^19.
+
+2025-06-13 Richard Earnshaw <rearnsha@arm.com>
+
+ Backported from master:
+ 2025-03-25 Richard Earnshaw <rearnsha@arm.com>
+
+ PR middle-end/117811
+ * optabs.cc (expand_binop_directly): Remove LAST as an argument,
+ instead record the last insn on entry. Only delete insns if
+ we need to restart and restart by calling ourself, not expand_binop.
+ (expand_binop): Update callers to expand_binop_directly. If it
+ fails to expand the operation, delete back to LAST.
+
+2025-06-13 Jakub Jelinek <jakub@redhat.com>
+
+ Backported from master:
+ 2025-06-12 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/120638
+ * tree-ssa-math-opts.cc (pass_cse_reciprocals::execute): Call
+ reset_flow_sensitive_info on arg1.
+
+2025-06-13 Jakub Jelinek <jakub@redhat.com>
+
+ Backported from master:
+ 2025-06-05 Jakub Jelinek <jakub@redhat.com>
+
+ PR middle-end/120547
+ * real.cc (real_from_integer): Remove maxbitlen variable, use
+ len instead of that. When shifting right, or in 1 if any of the
+ shifted away bits are non-zero. Formatting fix.
+
+2025-06-13 Jakub Jelinek <jakub@redhat.com>
+
+ Backported from master:
+ 2025-05-20 Jakub Jelinek <jakub@redhat.com>
+
+ * tree-chrec.cc (convert_affine_scev): Use signed_type_for instead of
+ build_nonstandard_integer_type.
+
+2025-06-05 Eric Botcazou <ebotcazou@adacore.com>
+
+ * tree-vect-data-refs.cc (vect_can_force_dr_alignment_p): Return
+ false if the variable has no symtab node.
+
+2025-05-30 Jakub Jelinek <jakub@redhat.com>
+
+ Backported from master:
+ 2025-04-17 Jakub Jelinek <jakub@redhat.com>
+
+ PR target/119834
+ * config/s390/s390.md (define_split after *cpymem_short): Use
+ (clobber (match_scratch N)) instead of (clobber (scratch)). Use
+ (match_dup 4) and operands[4] instead of (match_dup 3) and operands[3]
+ in the last of those.
+ (define_split after *clrmem_short): Use (clobber (match_scratch N))
+ instead of (clobber (scratch)).
+ (define_split after *cmpmem_short): Likewise.
+
+2025-05-26 Stefan Schulze Frielinghaus <stefansf@gcc.gnu.org>
+
+ Backported from master:
+ 2025-05-14 Stefan Schulze Frielinghaus <stefansf@gcc.gnu.org>
+
+ * config/s390/vector.md: Fix tf_to_fprx2 by using vlr instead of
+ ldr.
+
+2025-05-26 Jakub Jelinek <jakub@redhat.com>
+
+ Backported from master:
+ 2025-02-27 Jakub Jelinek <jakub@redhat.com>
+
+ PR middle-end/118819
+ * alias.cc (memrefs_conflict_p): Perform arithmetics on c, xsize and
+ ysize in poly_offset_int and return -1 if it is not representable in
+ poly_int64.
+
+2025-05-26 Jakub Jelinek <jakub@redhat.com>
+
+ Backported from master:
+ 2025-02-05 Jakub Jelinek <jakub@redhat.com>
+
+ PR rtl-optimization/117239
+ * cselib.cc (cselib_init): Remove spurious closing paren in
+ the #ifdef STACK_ADDRESS_OFFSET specific code.
+
+2025-05-26 Jakub Jelinek <jakub@redhat.com>
+
+ Backported from master:
+ 2025-02-05 Jakub Jelinek <jakub@redhat.com>
+
+ PR rtl-optimization/117239
+ * cselib.cc: Include predict.h.
+ (callmem): Change type from rtx to rtx[2].
+ (cselib_preserve_only_values): Use callmem[0] rather than callmem.
+ (cselib_invalidate_mem): Optimize and don't try to invalidate
+ for the mem_rtx == callmem[1] case MEMs which clearly can't be
+ below the stack pointer.
+ (cselib_process_insn): Use callmem[0] rather than callmem.
+ For const/pure calls also call cselib_invalidate_mem (callmem[1])
+ in !ACCUMULATE_OUTGOING_ARGS or cfun->calls_alloca functions.
+ (cselib_init): Initialize callmem[0] rather than callmem and also
+ initialize callmem[1].
+
+2025-05-26 Jakub Jelinek <jakub@redhat.com>
+
+ Backported from master:
+ 2024-11-28 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/117358
+ * gimple-fold.cc (gimple_fold_builtin_memory_op): Punt if stmt has no
+ vdef in ssa form.
+ (gimple_fold_builtin_bcmp): Punt if stmt has no vuse in ssa form.
+ (gimple_fold_builtin_bcopy): Punt if stmt has no vdef in ssa form.
+ (gimple_fold_builtin_bzero): Likewise.
+ (gimple_fold_builtin_memset): Likewise. Use return false instead of
+ return NULL_TREE.
+ (gimple_fold_builtin_strcpy): Punt if stmt has no vdef in ssa form.
+ (gimple_fold_builtin_strncpy): Likewise.
+ (gimple_fold_builtin_strchr): Punt if stmt has no vuse in ssa form.
+ (gimple_fold_builtin_strstr): Likewise.
+ (gimple_fold_builtin_strcat): Punt if stmt has no vdef in ssa form.
+ (gimple_fold_builtin_strcat_chk): Likewise.
+ (gimple_fold_builtin_strncat): Likewise.
+ (gimple_fold_builtin_strncat_chk): Likewise.
+ (gimple_fold_builtin_string_compare): Likewise.
+ (gimple_fold_builtin_fputs): Likewise.
+ (gimple_fold_builtin_memory_chk): Likewise.
+ (gimple_fold_builtin_stxcpy_chk): Likewise.
+ (gimple_fold_builtin_stxncpy_chk): Likewise.
+ (gimple_fold_builtin_stpcpy): Likewise.
+ (gimple_fold_builtin_snprintf_chk): Likewise.
+ (gimple_fold_builtin_sprintf_chk): Likewise.
+ (gimple_fold_builtin_sprintf): Likewise.
+ (gimple_fold_builtin_snprintf): Likewise.
+ (gimple_fold_builtin_fprintf): Likewise.
+ (gimple_fold_builtin_printf): Likewise.
+ (gimple_fold_builtin_realloc): Likewise.
+
+2025-05-25 Michael J. Eager <eager@eagercon.com>
+
+ PR target/86772
+ Tracking CVE-2017-5753
+ * config/microblaze/microblaze.cc (TARGET_HAVE_SPECULATION_SAFE_VALUE):
+ Define to speculation_save_value_not_needed
+
2025-05-23 Release Manager
* GCC 14.3.0 released.
--- a/src/gcc/DATESTAMP
+++ b/src/gcc/DATESTAMP
@@ -1 +1 @@
-20250523
+20250829
--- a/src/gcc/ada/ChangeLog
+++ b/src/gcc/ada/ChangeLog
@@ -1,3 +1,20 @@
+2025-07-03 Eric Botcazou <ebotcazou@adacore.com>
+
+ * gcc-interface/Makefile.in (gnatlib-sjlj): Delete.
+ (gnatlib-zcx): Do not modify Frontend_Exceptions constant.
+ * libgnat/system-linux-loongarch.ads (Frontend_Exceptions): Delete.
+
+2025-07-03 Eric Botcazou <ebotcazou@adacore.com>
+
+ * gcc-interface/decl.cc (gnat_to_gnu_component_type): Validate the
+ Component_Size like the size of a type only if the component type
+ is actually packed.
+
+2025-07-03 Eric Botcazou <ebotcazou@adacore.com>
+
+ * exp_ch4.adb (Handle_Changed_Representation): Alphabetize local
+ variables. Set the No_Finalize_Actions flag on the assignment.
+
2025-05-23 Release Manager
* GCC 14.3.0 released.
--- a/src/gcc/ada/exp_ch4.adb
+++ b/src/gcc/ada/exp_ch4.adb
@@ -11438,11 +11438,12 @@ package body Exp_Ch4 is
-----------------------------------
procedure Handle_Changed_Representation is
- Temp : Entity_Id;
+ Cons : List_Id;
Decl : Node_Id;
- Odef : Node_Id;
N_Ix : Node_Id;
- Cons : List_Id;
+ Odef : Node_Id;
+ Stmt : Node_Id;
+ Temp : Entity_Id;
begin
-- Nothing else to do if no change of representation
@@ -11585,19 +11586,24 @@ package body Exp_Ch4 is
Defining_Identifier => Temp,
Object_Definition => Odef);
- Set_No_Initialization (Decl, True);
+ -- The temporary need not be initialized
+
+ Set_No_Initialization (Decl);
+
+ Stmt :=
+ Make_Assignment_Statement (Loc,
+ Name => New_Occurrence_Of (Temp, Loc),
+ Expression => Relocate_Node (N));
+
+ -- And, therefore, cannot be finalized
+
+ Set_No_Finalize_Actions (Stmt);
-- Insert required actions. It is essential to suppress checks
-- since we have suppressed default initialization, which means
-- that the variable we create may have no discriminants.
- Insert_Actions (N,
- New_List (
- Decl,
- Make_Assignment_Statement (Loc,
- Name => New_Occurrence_Of (Temp, Loc),
- Expression => Relocate_Node (N))),
- Suppress => All_Checks);
+ Insert_Actions (N, New_List (Decl, Stmt), Suppress => All_Checks);
Rewrite (N, New_Occurrence_Of (Temp, Loc));
return;
--- a/src/gcc/ada/gcc-interface/Makefile.in
+++ b/src/gcc/ada/gcc-interface/Makefile.in
@@ -822,35 +822,6 @@ gnatlib-shared:
PICFLAG_FOR_TARGET="$(PICFLAG_FOR_TARGET)" \
$(GNATLIB_SHARED)
-# When building a SJLJ runtime for VxWorks, we need to ensure that the extra
-# linker options needed for ZCX are not passed to prevent the inclusion of
-# useless objects and potential troubles from the presence of extra symbols
-# and references in some configurations. The inhibition is performed by
-# commenting the pragma instead of deleting the line, as the latter might
-# result in getting multiple blank lines, hence possible style check errors.
-gnatlib-sjlj:
- $(MAKE) $(FLAGS_TO_PASS) \
- EH_MECHANISM="" \
- MULTISUBDIR="$(MULTISUBDIR)" \
- THREAD_KIND="$(THREAD_KIND)" \
- LN_S="$(LN_S)" \
- ../stamp-gnatlib1-$(RTSDIR)
- sed \
- -e 's/Frontend_Exceptions.*/Frontend_Exceptions : constant Boolean := True;/' \
- -e 's/ZCX_By_Default.*/ZCX_By_Default : constant Boolean := False;/' \
- $(RTSDIR)/system.ads > $(RTSDIR)/s.ads
- $(MV) $(RTSDIR)/s.ads $(RTSDIR)/system.ads
- $(MAKE) $(FLAGS_TO_PASS) \
- EH_MECHANISM="" \
- GNATLIBFLAGS="$(GNATLIBFLAGS)" \
- GNATLIBCFLAGS="$(GNATLIBCFLAGS)" \
- GNATLIBCFLAGS_FOR_C="$(GNATLIBCFLAGS_FOR_C)" \
- FORCE_DEBUG_ADAFLAGS="$(FORCE_DEBUG_ADAFLAGS)" \
- MULTISUBDIR="$(MULTISUBDIR)" \
- THREAD_KIND="$(THREAD_KIND)" \
- LN_S="$(LN_S)" \
- gnatlib
-
gnatlib-zcx:
$(MAKE) $(FLAGS_TO_PASS) \
EH_MECHANISM="-gcc" \
@@ -859,7 +830,6 @@ gnatlib-zcx:
LN_S="$(LN_S)" \
../stamp-gnatlib1-$(RTSDIR)
sed \
- -e 's/Frontend_Exceptions.*/Frontend_Exceptions : constant Boolean := False;/' \
-e 's/ZCX_By_Default.*/ZCX_By_Default : constant Boolean := True;/' \
$(RTSDIR)/system.ads > $(RTSDIR)/s.ads
$(MV) $(RTSDIR)/s.ads $(RTSDIR)/system.ads
--- a/src/gcc/ada/gcc-interface/decl.cc
+++ b/src/gcc/ada/gcc-interface/decl.cc
@@ -5328,7 +5328,7 @@ gnat_to_gnu_component_type (Entity_Id gnat_array, bool definition,
const bool is_bit_packed = Is_Bit_Packed_Array (gnat_array);
tree gnu_type = gnat_to_gnu_type (gnat_type);
tree gnu_comp_size;
- bool has_packed_components;
+ bool has_packed_component;
unsigned int max_align;
/* If an alignment is specified, use it as a cap on the component type
@@ -5349,16 +5349,22 @@ gnat_to_gnu_component_type (Entity_Id gnat_array, bool definition,
&& !TYPE_FAT_POINTER_P (gnu_type)
&& tree_fits_uhwi_p (TYPE_SIZE (gnu_type)))
{
- gnu_type = make_packable_type (gnu_type, false, max_align);
- has_packed_components = true;
+ tree gnu_packable_type = make_packable_type (gnu_type, false, max_align);
+ if (gnu_packable_type != gnu_type)
+ {
+ gnu_type = gnu_packable_type;
+ has_packed_component = true;
+ }
+ else
+ has_packed_component = false;
}
else
- has_packed_components = is_bit_packed;
+ has_packed_component = is_bit_packed;
/* Get and validate any specified Component_Size. */
gnu_comp_size
= validate_size (Component_Size (gnat_array), gnu_type, gnat_array,
- has_packed_components ? TYPE_DECL : VAR_DECL, true,
+ has_packed_component ? TYPE_DECL : VAR_DECL, true,
Has_Component_Size_Clause (gnat_array), NULL, NULL);
/* If the component type is a RECORD_TYPE that has a self-referential size,
--- a/src/gcc/ada/libgnat/system-linux-loongarch.ads
+++ b/src/gcc/ada/libgnat/system-linux-loongarch.ads
@@ -139,7 +139,6 @@ private
Always_Compatible_Rep : constant Boolean := False;
Suppress_Standard_Library : constant Boolean := False;
Use_Ada_Main_Program_Name : constant Boolean := False;
- Frontend_Exceptions : constant Boolean := False;
ZCX_By_Default : constant Boolean := True;
end System;
--- a/src/gcc/alias.cc
+++ b/src/gcc/alias.cc
@@ -2533,19 +2533,39 @@ memrefs_conflict_p (poly_int64 xsize, rtx x, poly_int64 ysize, rtx y,
return memrefs_conflict_p (xsize, x1, ysize, y1, c);
if (poly_int_rtx_p (x1, &cx1))
{
+ poly_offset_int co = c;
+ co -= cx1;
if (poly_int_rtx_p (y1, &cy1))
- return memrefs_conflict_p (xsize, x0, ysize, y0,
- c - cx1 + cy1);
+ {
+ co += cy1;
+ if (!co.to_shwi (&c))
+ return -1;
+ return memrefs_conflict_p (xsize, x0, ysize, y0, c);
+ }
+ else if (!co.to_shwi (&c))
+ return -1;
else
- return memrefs_conflict_p (xsize, x0, ysize, y, c - cx1);
+ return memrefs_conflict_p (xsize, x0, ysize, y, c);
}
else if (poly_int_rtx_p (y1, &cy1))
- return memrefs_conflict_p (xsize, x, ysize, y0, c + cy1);
+ {
+ poly_offset_int co = c;
+ co += cy1;
+ if (!co.to_shwi (&c))
+ return -1;
+ return memrefs_conflict_p (xsize, x, ysize, y0, c);
+ }
return -1;
}
else if (poly_int_rtx_p (x1, &cx1))
- return memrefs_conflict_p (xsize, x0, ysize, y, c - cx1);
+ {
+ poly_offset_int co = c;
+ co -= cx1;
+ if (!co.to_shwi (&c))
+ return -1;
+ return memrefs_conflict_p (xsize, x0, ysize, y, c);
+ }
}
else if (GET_CODE (y) == PLUS)
{
@@ -2561,7 +2581,13 @@ memrefs_conflict_p (poly_int64 xsize, rtx x, poly_int64 ysize, rtx y,
poly_int64 cy1;
if (poly_int_rtx_p (y1, &cy1))
- return memrefs_conflict_p (xsize, x, ysize, y0, c + cy1);
+ {
+ poly_offset_int co = c;
+ co += cy1;
+ if (!co.to_shwi (&c))
+ return -1;
+ return memrefs_conflict_p (xsize, x, ysize, y0, c);
+ }
else
return -1;
}
@@ -2614,8 +2640,16 @@ memrefs_conflict_p (poly_int64 xsize, rtx x, poly_int64 ysize, rtx y,
if (maybe_gt (xsize, 0))
xsize = -xsize;
if (maybe_ne (xsize, 0))
- xsize += sc + 1;
- c -= sc + 1;
+ {
+ poly_offset_int xsizeo = xsize;
+ xsizeo += sc + 1;
+ if (!xsizeo.to_shwi (&xsize))
+ return -1;
+ }
+ poly_offset_int co = c;
+ co -= sc + 1;
+ if (!co.to_shwi (&c))
+ return -1;
return memrefs_conflict_p (xsize, canon_rtx (XEXP (x, 0)),
ysize, y, c);
}
@@ -2629,8 +2663,16 @@ memrefs_conflict_p (poly_int64 xsize, rtx x, poly_int64 ysize, rtx y,
if (maybe_gt (ysize, 0))
ysize = -ysize;
if (maybe_ne (ysize, 0))
- ysize += sc + 1;
- c += sc + 1;
+ {
+ poly_offset_int ysizeo = ysize;
+ ysizeo += sc + 1;
+ if (!ysizeo.to_shwi (&ysize))
+ return -1;
+ }
+ poly_offset_int co = c;
+ co += sc + 1;
+ if (!co.to_shwi (&c))
+ return -1;
return memrefs_conflict_p (xsize, x,
ysize, canon_rtx (XEXP (y, 0)), c);
}
@@ -2641,7 +2683,11 @@ memrefs_conflict_p (poly_int64 xsize, rtx x, poly_int64 ysize, rtx y,
poly_int64 cx, cy;
if (poly_int_rtx_p (x, &cx) && poly_int_rtx_p (y, &cy))
{
- c += cy - cx;
+ poly_offset_int co = c;
+ co += cy;
+ co -= cx;
+ if (!co.to_shwi (&c))
+ return -1;
return offset_overlap_p (c, xsize, ysize);
}
--- a/src/gcc/c-family/ChangeLog
+++ b/src/gcc/c-family/ChangeLog
@@ -1,3 +1,14 @@
+2025-08-08 Jakub Jelinek <jakub@redhat.com>
+
+ Backported from master:
+ 2025-07-04 Jakub Jelinek <jakub@redhat.com>
+
+ PR c/120837
+ * c-common.cc (pointer_int_sum): Rewrite the intop PLUS_EXPR or
+ MINUS_EXPR optimization into extension of both intop operands,
+ their separate multiplication and then addition/subtraction followed
+ by rest of pointer_int_sum handling after the multiplication.
+
2025-05-23 Release Manager
* GCC 14.3.0 released.
--- a/src/gcc/c-family/c-common.cc
+++ b/src/gcc/c-family/c-common.cc
@@ -3420,20 +3420,41 @@ pointer_int_sum (location_t loc, enum tree_code resultcode,
an overflow error if the constant is negative but INTOP is not. */
&& (TYPE_OVERFLOW_UNDEFINED (TREE_TYPE (intop))
|| (TYPE_PRECISION (TREE_TYPE (intop))
- == TYPE_PRECISION (TREE_TYPE (ptrop)))))
- {
- enum tree_code subcode = resultcode;
- tree int_type = TREE_TYPE (intop);
- if (TREE_CODE (intop) == MINUS_EXPR)
- subcode = (subcode == PLUS_EXPR ? MINUS_EXPR : PLUS_EXPR);
- /* Convert both subexpression types to the type of intop,
- because weird cases involving pointer arithmetic
- can result in a sum or difference with different type args. */
- ptrop = build_binary_op (EXPR_LOCATION (TREE_OPERAND (intop, 1)),
- subcode, ptrop,
- convert (int_type, TREE_OPERAND (intop, 1)),
- true);
- intop = convert (int_type, TREE_OPERAND (intop, 0));
+ == TYPE_PRECISION (TREE_TYPE (ptrop))))
+ && TYPE_PRECISION (TREE_TYPE (intop)) <= TYPE_PRECISION (sizetype))
+ {
+ tree intop0 = TREE_OPERAND (intop, 0);
+ tree intop1 = TREE_OPERAND (intop, 1);
+ if (TYPE_PRECISION (TREE_TYPE (intop)) != TYPE_PRECISION (sizetype)
+ || TYPE_UNSIGNED (TREE_TYPE (intop)) != TYPE_UNSIGNED (sizetype))
+ {
+ tree optype = c_common_type_for_size (TYPE_PRECISION (sizetype),
+ TYPE_UNSIGNED (sizetype));
+ intop0 = convert (optype, intop0);
+ intop1 = convert (optype, intop1);
+ }
+ tree t = fold_build2_loc (loc, MULT_EXPR, TREE_TYPE (intop0), intop0,
+ convert (TREE_TYPE (intop0), size_exp));
+ intop0 = convert (sizetype, t);
+ if (TREE_OVERFLOW_P (intop0) && !TREE_OVERFLOW (t))
+ intop0 = wide_int_to_tree (TREE_TYPE (intop0), wi::to_wide (intop0));
+ t = fold_build2_loc (loc, MULT_EXPR, TREE_TYPE (intop1), intop1,
+ convert (TREE_TYPE (intop1), size_exp));
+ intop1 = convert (sizetype, t);
+ if (TREE_OVERFLOW_P (intop1) && !TREE_OVERFLOW (t))
+ intop1 = wide_int_to_tree (TREE_TYPE (intop1), wi::to_wide (intop1));
+ intop = build_binary_op (EXPR_LOCATION (intop), TREE_CODE (intop),
+ intop0, intop1, true);
+
+ /* Create the sum or difference. */
+ if (resultcode == MINUS_EXPR)
+ intop = fold_build1_loc (loc, NEGATE_EXPR, sizetype, intop);
+
+ ret = fold_build_pointer_plus_loc (loc, ptrop, intop);
+
+ fold_undefer_and_ignore_overflow_warnings ();
+
+ return ret;
}
/* Convert the integer argument to a type the same size as sizetype
--- a/src/gcc/config/aarch64/aarch64-sme.md
+++ b/src/gcc/config/aarch64/aarch64-sme.md
@@ -61,6 +61,10 @@
;; (b) they are sometimes used conditionally, particularly in streaming-
;; compatible code.
;;
+;; To prevent the latter from upsetting the assembler, we emit the literal
+;; encodings of "SMSTART SM" and "SMSTOP SM" when compiling without
+;; TARGET_SME.
+;;
;; =========================================================================
;; -------------------------------------------------------------------------
@@ -160,7 +164,9 @@ (define_insn "aarch64_smstart_sm"
(clobber (reg:VNx16BI P14_REGNUM))
(clobber (reg:VNx16BI P15_REGNUM))]
""
- "smstart\tsm"
+ {
+ return TARGET_SME ? "smstart\tsm" : ".inst 0xd503437f // smstart sm";
+ }
)
;; Turn off streaming mode. This clobbers all SVE state.
@@ -195,7 +201,9 @@ (define_insn "aarch64_smstop_sm"
(clobber (reg:VNx16BI P14_REGNUM))
(clobber (reg:VNx16BI P15_REGNUM))]
""
- "smstop\tsm"
+ {
+ return TARGET_SME ? "smstop\tsm" : ".inst 0xd503427f // smstop sm";
+ }
)
;; -------------------------------------------------------------------------
@@ -373,6 +381,8 @@ (define_insn_and_split "aarch64_restore_za"
(reg:DI SME_STATE_REGNUM)
(reg:DI TPIDR2_SETUP_REGNUM)
(reg:DI ZA_SAVED_REGNUM)] UNSPEC_RESTORE_ZA))
+ (set (reg:DI SME_STATE_REGNUM)
+ (unspec:DI [(reg:DI SME_STATE_REGNUM)] UNSPEC_TPIDR2_RESTORE))
(clobber (reg:DI R0_REGNUM))
(clobber (reg:DI R14_REGNUM))
(clobber (reg:DI R15_REGNUM))
--- a/src/gcc/config/aarch64/aarch64-sve-builtins-base.cc
+++ b/src/gcc/config/aarch64/aarch64-sve-builtins-base.cc
@@ -2396,7 +2396,10 @@ public:
rtx
expand (function_expander &e) const override
{
- return e.use_exact_insn (code_for_aarch64_sve_rev (e.vector_mode (0)));
+ auto mode = e.vector_mode (0);
+ return e.use_exact_insn (e.type_suffix (0).bool_p
+ ? code_for_aarch64_sve_rev_acle (mode)
+ : code_for_aarch64_sve_rev (mode));
}
};
--- a/src/gcc/config/aarch64/aarch64-sve-builtins-functions.h
+++ b/src/gcc/config/aarch64/aarch64-sve-builtins-functions.h
@@ -615,7 +615,10 @@ public:
rtx
expand (function_expander &e) const override
{
- insn_code icode = code_for_aarch64_sve (m_unspec, e.vector_mode (0));
+ auto mode = e.vector_mode (0);
+ insn_code icode = (e.type_suffix (0).bool_p
+ ? code_for_aarch64_sve_acle (m_unspec, mode)
+ : code_for_aarch64_sve (m_unspec, mode));
return e.use_exact_insn (icode);
}
--- a/src/gcc/config/aarch64/aarch64-sve.md
+++ b/src/gcc/config/aarch64/aarch64-sve.md
@@ -1458,18 +1458,18 @@ (define_insn "mask_gather_load<mode><v_int_container>"
UNSPEC_LD1_GATHER))]
"TARGET_SVE && TARGET_NON_STREAMING"
{@ [cons: =0, 1, 2, 3, 4, 5 ]
- [&w, Z, w, Ui1, Ui1, Upl] ld1<Vesize>\t%0.s, %5/z, [%2.s]
- [?w, Z, 0, Ui1, Ui1, Upl] ^
- [&w, vgw, w, Ui1, Ui1, Upl] ld1<Vesize>\t%0.s, %5/z, [%2.s, #%1]
- [?w, vgw, 0, Ui1, Ui1, Upl] ^
- [&w, rk, w, Z, Ui1, Upl] ld1<Vesize>\t%0.s, %5/z, [%1, %2.s, sxtw]
- [?w, rk, 0, Z, Ui1, Upl] ^
- [&w, rk, w, Ui1, Ui1, Upl] ld1<Vesize>\t%0.s, %5/z, [%1, %2.s, uxtw]
- [?w, rk, 0, Ui1, Ui1, Upl] ^
- [&w, rk, w, Z, i, Upl] ld1<Vesize>\t%0.s, %5/z, [%1, %2.s, sxtw %p4]
- [?w, rk, 0, Z, i, Upl] ^
- [&w, rk, w, Ui1, i, Upl] ld1<Vesize>\t%0.s, %5/z, [%1, %2.s, uxtw %p4]
- [?w, rk, 0, Ui1, i, Upl] ^
+ [&w, Z, w, Ui1, Ui1, Upl] ld1<Vesize>\t%0.s, %5/z, [%2.s]
+ [?w, Z, 0, Ui1, Ui1, Upl] ^
+ [&w, vg<Vesize>, w, Ui1, Ui1, Upl] ld1<Vesize>\t%0.s, %5/z, [%2.s, #%1]
+ [?w, vg<Vesize>, 0, Ui1, Ui1, Upl] ^
+ [&w, rk, w, Z, Ui1, Upl] ld1<Vesize>\t%0.s, %5/z, [%1, %2.s, sxtw]
+ [?w, rk, 0, Z, Ui1, Upl] ^
+ [&w, rk, w, Ui1, Ui1, Upl] ld1<Vesize>\t%0.s, %5/z, [%1, %2.s, uxtw]
+ [?w, rk, 0, Ui1, Ui1, Upl] ^
+ [&w, rk, w, Z, i, Upl] ld1<Vesize>\t%0.s, %5/z, [%1, %2.s, sxtw %p4]
+ [?w, rk, 0, Z, i, Upl] ^
+ [&w, rk, w, Ui1, i, Upl] ld1<Vesize>\t%0.s, %5/z, [%1, %2.s, uxtw %p4]
+ [?w, rk, 0, Ui1, i, Upl] ^
}
)
@@ -1487,14 +1487,14 @@ (define_insn "mask_gather_load<mode><v_int_container>"
UNSPEC_LD1_GATHER))]
"TARGET_SVE && TARGET_NON_STREAMING"
{@ [cons: =0, 1, 2, 3, 4, 5]
- [&w, Z, w, i, Ui1, Upl] ld1<Vesize>\t%0.d, %5/z, [%2.d]
- [?w, Z, 0, i, Ui1, Upl] ^
- [&w, vgd, w, i, Ui1, Upl] ld1<Vesize>\t%0.d, %5/z, [%2.d, #%1]
- [?w, vgd, 0, i, Ui1, Upl] ^
- [&w, rk, w, i, Ui1, Upl] ld1<Vesize>\t%0.d, %5/z, [%1, %2.d]
- [?w, rk, 0, i, Ui1, Upl] ^
- [&w, rk, w, i, i, Upl] ld1<Vesize>\t%0.d, %5/z, [%1, %2.d, lsl %p4]
- [?w, rk, 0, i, i, Upl] ^
+ [&w, Z, w, i, Ui1, Upl] ld1<Vesize>\t%0.d, %5/z, [%2.d]
+ [?w, Z, 0, i, Ui1, Upl] ^
+ [&w, vg<Vesize>, w, i, Ui1, Upl] ld1<Vesize>\t%0.d, %5/z, [%2.d, #%1]
+ [?w, vg<Vesize>, 0, i, Ui1, Upl] ^
+ [&w, rk, w, i, Ui1, Upl] ld1<Vesize>\t%0.d, %5/z, [%1, %2.d]
+ [?w, rk, 0, i, Ui1, Upl] ^
+ [&w, rk, w, i, i, Upl] ld1<Vesize>\t%0.d, %5/z, [%1, %2.d, lsl %p4]
+ [?w, rk, 0, i, i, Upl] ^
}
)
@@ -2378,13 +2378,13 @@ (define_insn "mask_scatter_store<mode><v_int_container>"
(match_operand:SVE_4 4 "register_operand")]
UNSPEC_ST1_SCATTER))]
"TARGET_SVE && TARGET_NON_STREAMING"
- {@ [ cons: 0 , 1 , 2 , 3 , 4 , 5 ]
- [ Z , w , Ui1 , Ui1 , w , Upl ] st1<Vesize>\t%4.s, %5, [%1.s]
- [ vgw , w , Ui1 , Ui1 , w , Upl ] st1<Vesize>\t%4.s, %5, [%1.s, #%0]
- [ rk , w , Z , Ui1 , w , Upl ] st1<Vesize>\t%4.s, %5, [%0, %1.s, sxtw]
- [ rk , w , Ui1 , Ui1 , w , Upl ] st1<Vesize>\t%4.s, %5, [%0, %1.s, uxtw]
- [ rk , w , Z , i , w , Upl ] st1<Vesize>\t%4.s, %5, [%0, %1.s, sxtw %p3]
- [ rk , w , Ui1 , i , w , Upl ] st1<Vesize>\t%4.s, %5, [%0, %1.s, uxtw %p3]
+ {@ [ cons: 0 , 1 , 2 , 3 , 4 , 5 ]
+ [ Z , w , Ui1 , Ui1 , w , Upl ] st1<Vesize>\t%4.s, %5, [%1.s]
+ [ vg<Vesize> , w , Ui1 , Ui1 , w , Upl ] st1<Vesize>\t%4.s, %5, [%1.s, #%0]
+ [ rk , w , Z , Ui1 , w , Upl ] st1<Vesize>\t%4.s, %5, [%0, %1.s, sxtw]
+ [ rk , w , Ui1 , Ui1 , w , Upl ] st1<Vesize>\t%4.s, %5, [%0, %1.s, uxtw]
+ [ rk , w , Z , i , w , Upl ] st1<Vesize>\t%4.s, %5, [%0, %1.s, sxtw %p3]
+ [ rk , w , Ui1 , i , w , Upl ] st1<Vesize>\t%4.s, %5, [%0, %1.s, uxtw %p3]
}
)
@@ -2401,11 +2401,11 @@ (define_insn "mask_scatter_store<mode><v_int_container>"
(match_operand:SVE_2 4 "register_operand")]
UNSPEC_ST1_SCATTER))]
"TARGET_SVE && TARGET_NON_STREAMING"
- {@ [ cons: 0 , 1 , 3 , 4 , 5 ]
- [ Z , w , Ui1 , w , Upl ] st1<Vesize>\t%4.d, %5, [%1.d]
- [ vgd , w , Ui1 , w , Upl ] st1<Vesize>\t%4.d, %5, [%1.d, #%0]
- [ rk , w , Ui1 , w , Upl ] st1<Vesize>\t%4.d, %5, [%0, %1.d]
- [ rk , w , i , w , Upl ] st1<Vesize>\t%4.d, %5, [%0, %1.d, lsl %p3]
+ {@ [ cons: 0 , 1 , 3 , 4 , 5 ]
+ [ Z , w , Ui1 , w , Upl ] st1<Vesize>\t%4.d, %5, [%1.d]
+ [ vg<Vesize> , w , Ui1 , w , Upl ] st1<Vesize>\t%4.d, %5, [%1.d, #%0]
+ [ rk , w , Ui1 , w , Upl ] st1<Vesize>\t%4.d, %5, [%0, %1.d]
+ [ rk , w , i , w , Upl ] st1<Vesize>\t%4.d, %5, [%0, %1.d, lsl %p3]
}
)
@@ -6422,10 +6422,10 @@ (define_expand "@aarch64_frecps<mode>"
;; by providing this, but we need to use UNSPECs since rtx logical ops
;; aren't defined for floating-point modes.
(define_insn "*<optab><mode>3"
- [(set (match_operand:SVE_FULL_F 0 "register_operand" "=w")
- (unspec:SVE_FULL_F
- [(match_operand:SVE_FULL_F 1 "register_operand" "w")
- (match_operand:SVE_FULL_F 2 "register_operand" "w")]
+ [(set (match_operand:SVE_F 0 "register_operand" "=w")
+ (unspec:SVE_F
+ [(match_operand:SVE_F 1 "register_operand" "w")
+ (match_operand:SVE_F 2 "register_operand" "w")]
LOGICALF))]
"TARGET_SVE"
"<logicalf_op>\t%0.d, %1.d, %2.d"
@@ -9123,7 +9123,30 @@ (define_insn "@aarch64_sve_rev<mode>"
(unspec:PRED_ALL [(match_operand:PRED_ALL 1 "register_operand" "Upa")]
UNSPEC_REV))]
"TARGET_SVE"
- "rev\t%0.<Vetype>, %1.<Vetype>")
+ "rev\t%0.<Vetype>, %1.<Vetype>"
+)
+
+(define_expand "@aarch64_sve_rev<mode>_acle"
+ [(set (match_operand:VNx16BI 0 "register_operand")
+ (unspec:VNx16BI
+ [(match_operand:VNx16BI 1 "register_operand")
+ (match_dup:PRED_ALL 2)]
+ UNSPEC_REV_PRED))]
+ "TARGET_SVE"
+ {
+ operands[2] = CONST0_RTX (<MODE>mode);
+ }
+)
+
+(define_insn "*aarch64_sve_rev<mode>_acle"
+ [(set (match_operand:VNx16BI 0 "register_operand" "=Upa")
+ (unspec:VNx16BI
+ [(match_operand:VNx16BI 1 "register_operand" "Upa")
+ (match_operand:PRED_ALL 2 "aarch64_simd_imm_zero")]
+ UNSPEC_REV_PRED))]
+ "TARGET_SVE"
+ "rev\t%0.<Vetype>, %1.<Vetype>"
+)
;; -------------------------------------------------------------------------
;; ---- [PRED] Special-purpose binary permutes
@@ -9148,18 +9171,39 @@ (define_insn "@aarch64_sve_<perm_insn><mode>"
"<perm_insn>\t%0.<Vetype>, %1.<Vetype>, %2.<Vetype>"
)
-;; Special purpose permute used by the predicate generation instructions.
-;; Unlike the normal permute patterns, these instructions operate on VNx16BI
-;; regardless of the element size, so that all input and output bits are
-;; well-defined. Operand 3 then indicates the size of the permute.
-(define_insn "@aarch64_sve_trn1_conv<mode>"
+;; Special-purpose permutes used by the ACLE intrinsics and predicate
+;; generation instructions. Unlike the normal permute patterns, these
+;; instructions operate on VNx16BI regardless of the element size, so that
+;; all input and output bits are well-defined. Operand 3 then indicates
+;; the size of the permute.
+;;
+;; To make generation easier, this pattern embeds the permute type as the
+;; fourth operand to the unspec. On the one hand, this avoids overloading
+;; unspecs like UNSPEC_ZIP1 to represent two different operations. On the
+;; other hand, it avoids having a separate unspec for each variant, and
+;; having to map from one kind of unspec to the other.
+(define_expand "@aarch64_sve_<perm_insn><mode>_acle"
+ [(set (match_operand:VNx16BI 0 "register_operand")
+ (unspec:VNx16BI [(match_operand:VNx16BI 1 "register_operand")
+ (match_operand:VNx16BI 2 "register_operand")
+ (match_dup:PRED_ALL 3)
+ (const_int PERMUTE)]
+ UNSPEC_PERMUTE_PRED))]
+ "TARGET_SVE"
+ {
+ operands[3] = CONST0_RTX (<MODE>mode);
+ }
+)
+
+(define_insn "*aarch64_sve_<perm_insn><mode>_acle"
[(set (match_operand:VNx16BI 0 "register_operand" "=Upa")
(unspec:VNx16BI [(match_operand:VNx16BI 1 "register_operand" "Upa")
(match_operand:VNx16BI 2 "register_operand" "Upa")
- (match_operand:PRED_ALL 3 "aarch64_simd_imm_zero")]
- UNSPEC_TRN1_CONV))]
+ (match_operand:PRED_ALL 3 "aarch64_simd_imm_zero")
+ (const_int PERMUTE)]
+ UNSPEC_PERMUTE_PRED))]
"TARGET_SVE"
- "trn1\t%0.<PRED_ALL:Vetype>, %1.<PRED_ALL:Vetype>, %2.<PRED_ALL:Vetype>"
+ "<perm_insn>\t%0.<PRED_ALL:Vetype>, %1.<PRED_ALL:Vetype>, %2.<PRED_ALL:Vetype>"
)
;; =========================================================================
@@ -10989,16 +11033,12 @@ (define_insn_and_split "@aarch64_sve_get_neonq_<mode>"
(define_insn "@aarch64_sve_set_neonq_<mode>"
[(set (match_operand:SVE_FULL 0 "register_operand" "=w")
- (unspec:SVE_FULL
- [(match_operand:SVE_FULL 1 "register_operand" "w")
- (match_operand:<V128> 2 "register_operand" "w")
- (match_operand:<VPRED> 3 "register_operand" "Upl")]
- UNSPEC_SET_NEONQ))]
+ (unspec:SVE_FULL
+ [(match_operand:SVE_FULL 1 "register_operand" "w")
+ (match_operand:<V128> 2 "register_operand" "w")
+ (match_operand:<VPRED> 3 "register_operand" "Upl")]
+ UNSPEC_SET_NEONQ))]
"TARGET_SVE
&& BYTES_BIG_ENDIAN"
- {
- operands[2] = lowpart_subreg (<MODE>mode, operands[2],
- GET_MODE (operands[2]));
- return "sel\t%0.<Vetype>, %3, %2.<Vetype>, %1.<Vetype>";
- }
+ "sel\t%0.<Vetype>, %3, %Z2.<Vetype>, %1.<Vetype>"
)
--- a/src/gcc/config/aarch64/aarch64.cc
+++ b/src/gcc/config/aarch64/aarch64.cc
@@ -5679,7 +5679,7 @@ aarch64_sve_move_pred_via_while (rtx target, machine_mode mode,
target = aarch64_target_reg (target, mode);
emit_insn (gen_while (UNSPEC_WHILELO, DImode, mode,
target, const0_rtx, limit));
- return target;
+ return gen_lowpart (VNx16BImode, target);
}
static rtx
@@ -5824,8 +5824,7 @@ aarch64_expand_sve_const_pred_trn (rtx target, rtx_vector_builder &builder,
operands but permutes them as though they had mode MODE. */
machine_mode mode = aarch64_sve_pred_mode (permute_size).require ();
target = aarch64_target_reg (target, GET_MODE (a));
- rtx type_reg = CONST0_RTX (mode);
- emit_insn (gen_aarch64_sve_trn1_conv (mode, target, a, b, type_reg));
+ emit_insn (gen_aarch64_sve_acle (UNSPEC_TRN1, mode, target, a, b));
return target;
}
@@ -24019,6 +24018,13 @@ aarch64_expand_vector_init (rtx target, rtx vals)
emit_insn (rec_seq);
}
+ /* The two halves should (by induction) be individually endian-correct.
+ However, in the memory layout provided by VALS, the nth element of
+ HALVES[0] comes immediately before the nth element HALVES[1].
+ This means that, on big-endian targets, the nth element of HALVES[0]
+ is more significant than the nth element HALVES[1]. */
+ if (BYTES_BIG_ENDIAN)
+ std::swap (halves[0], halves[1]);
rtvec v = gen_rtvec (2, halves[0], halves[1]);
rtx_insn *zip1_insn
= emit_set_insn (target, gen_rtx_UNSPEC (mode, v, UNSPEC_ZIP1));
@@ -24432,20 +24438,41 @@ aarch64_asm_preferred_eh_data_format (int code ATTRIBUTE_UNUSED, int global)
return (global ? DW_EH_PE_indirect : 0) | DW_EH_PE_pcrel | type;
}
+/* Return true if function declaration FNDECL needs to be marked as
+ having a variant PCS. */
+
+static bool
+aarch64_is_variant_pcs (tree fndecl)
+{
+ /* Check for ABIs that preserve more registers than usual. */
+ arm_pcs pcs = (arm_pcs) fndecl_abi (fndecl).id ();
+ if (pcs == ARM_PCS_SIMD || pcs == ARM_PCS_SVE)
+ return true;
+
+ /* Check for ABIs that allow PSTATE.SM to be 1 on entry. */
+ tree fntype = TREE_TYPE (fndecl);
+ if (aarch64_fntype_pstate_sm (fntype) != AARCH64_FL_SM_OFF)
+ return true;
+
+ /* Check for ABIs that require PSTATE.ZA to be 1 on entry, either because
+ of ZA or ZT0. */
+ if (aarch64_fntype_pstate_za (fntype) != 0)
+ return true;
+
+ return false;
+}
+
/* Output .variant_pcs for aarch64_vector_pcs function symbols. */
static void
aarch64_asm_output_variant_pcs (FILE *stream, const tree decl, const char* name)
{
- if (TREE_CODE (decl) == FUNCTION_DECL)
+ if (TREE_CODE (decl) == FUNCTION_DECL
+ && aarch64_is_variant_pcs (decl))
{
- arm_pcs pcs = (arm_pcs) fndecl_abi (decl).id ();
- if (pcs == ARM_PCS_SIMD || pcs == ARM_PCS_SVE)
- {
- fprintf (stream, "\t.variant_pcs\t");
- assemble_name (stream, name);
- fprintf (stream, "\n");
- }
+ fprintf (stream, "\t.variant_pcs\t");
+ assemble_name (stream, name);
+ fprintf (stream, "\n");
}
}
@@ -25934,12 +25961,23 @@ aarch64_evpc_tbl (struct expand_vec_perm_d *d)
static bool
aarch64_evpc_sve_tbl (struct expand_vec_perm_d *d)
{
- unsigned HOST_WIDE_INT nelt;
+ if (!d->one_vector_p)
+ {
+ /* aarch64_expand_sve_vec_perm does not yet handle variable-length
+ vectors. */
+ if (!d->perm.length ().is_constant ())
+ return false;
- /* Permuting two variable-length vectors could overflow the
- index range. */
- if (!d->one_vector_p && !d->perm.length ().is_constant (&nelt))
- return false;
+ /* This permutation reduces to the vec_perm optab if the elements are
+ large enough to hold all selector indices. Do not handle that case
+ here, since the general TBL+SUB+TBL+ORR sequence is too expensive to
+ be considered a "native" constant permutation.
+
+ Not doing this would undermine code that queries can_vec_perm_const_p
+ with allow_variable_p set to false. See PR121027. */
+ if (selector_fits_mode_p (d->vmode, d->perm))
+ return false;
+ }
if (d->testing_p)
return true;
--- a/src/gcc/config/aarch64/aarch64.md
+++ b/src/gcc/config/aarch64/aarch64.md
@@ -132,6 +132,14 @@ (define_constants
;; The actual value can sometimes vary, because it does not track
;; changes to PSTATE.ZA that happen during a lazy save and restore.
;; Those effects are instead tracked by ZA_SAVED_REGNUM.
+ ;;
+ ;; Sequences also write to this register if they synchronize the
+ ;; actual contents of ZA and PSTATE.ZA with the current function's
+ ;; ZA_REGNUM and SME_STATE_REGNUM. Conceptually, these extra writes
+ ;; do not change the value of SME_STATE_REGNUM. They simply act as
+ ;; sequencing points. They means that all direct accesses to ZA can
+ ;; depend only on ZA_REGNUM and SME_STATE_REGNUM, rather than also
+ ;; depending on ZA_SAVED_REGNUM etc.
(SME_STATE_REGNUM 88)
;; Instructions write to this register if they set TPIDR2_EL0 to a
@@ -259,6 +267,7 @@ (define_c_enum "unspec" [
UNSPEC_PACIBSP
UNSPEC_PRLG_STK
UNSPEC_REV
+ UNSPEC_REV_PRED
UNSPEC_RBIT
UNSPEC_SADALP
UNSPEC_SCVTF
--- a/src/gcc/config/aarch64/iterators.md
+++ b/src/gcc/config/aarch64/iterators.md
@@ -519,15 +519,20 @@ (define_mode_iterator SVE_PARTIAL_I [VNx8QI VNx4QI VNx2QI
VNx4HI VNx2HI
VNx2SI])
+;; All SVE integer vector modes.
+(define_mode_iterator SVE_I [VNx16QI VNx8QI VNx4QI VNx2QI
+ VNx8HI VNx4HI VNx2HI
+ VNx4SI VNx2SI
+ VNx2DI])
+
+;; All SVE floating-point vector modes.
+(define_mode_iterator SVE_F [VNx8HF VNx4HF VNx2HF
+ VNx8BF VNx4BF VNx2BF
+ VNx4SF VNx2SF
+ VNx2DF])
+
;; All SVE vector modes.
-(define_mode_iterator SVE_ALL [VNx16QI VNx8QI VNx4QI VNx2QI
- VNx8HI VNx4HI VNx2HI
- VNx8HF VNx4HF VNx2HF
- VNx8BF VNx4BF VNx2BF
- VNx4SI VNx2SI
- VNx4SF VNx2SF
- VNx2DI
- VNx2DF])
+(define_mode_iterator SVE_ALL [SVE_I SVE_F])
;; All SVE 2-vector modes.
(define_mode_iterator SVE_FULLx2 [VNx32QI VNx16HI VNx8SI VNx4DI
@@ -549,12 +554,6 @@ (define_mode_iterator SVE_STRUCT [SVE_FULLx2 SVE_FULLx3 SVE_FULLx4])
;; All SVE vector and structure modes.
(define_mode_iterator SVE_ALL_STRUCT [SVE_ALL SVE_STRUCT])
-;; All SVE integer vector modes.
-(define_mode_iterator SVE_I [VNx16QI VNx8QI VNx4QI VNx2QI
- VNx8HI VNx4HI VNx2HI
- VNx4SI VNx2SI
- VNx2DI])
-
;; All SVE integer vector modes and Advanced SIMD 64-bit vector
;; element modes
(define_mode_iterator SVE_I_SIMD_DI [SVE_I V2DI])
@@ -824,7 +823,6 @@ (define_c_enum "unspec"
UNSPEC_UZP2Q ; Used in aarch64-sve.md.
UNSPEC_ZIP1Q ; Used in aarch64-sve.md.
UNSPEC_ZIP2Q ; Used in aarch64-sve.md.
- UNSPEC_TRN1_CONV ; Used in aarch64-sve.md.
UNSPEC_COND_CMPEQ_WIDE ; Used in aarch64-sve.md.
UNSPEC_COND_CMPGE_WIDE ; Used in aarch64-sve.md.
UNSPEC_COND_CMPGT_WIDE ; Used in aarch64-sve.md.
@@ -1054,6 +1052,9 @@ (define_c_enum "unspec"
UNSPEC_BFCVT ; Used in aarch64-simd.md.
UNSPEC_FCVTXN ; Used in aarch64-simd.md.
+ ;; All used in aarch64-sve.md
+ UNSPEC_PERMUTE_PRED
+
;; All used in aarch64-sve2.md
UNSPEC_FCVTN
UNSPEC_FDOT
--- a/src/gcc/config/avr/avr-mcus.def
+++ b/src/gcc/config/avr/avr-mcus.def
@@ -313,6 +313,10 @@ AVR_MCU ("avr64da28", ARCH_AVRXMEGA2, AVR_ISA_FLMAP, "__AVR_AVR64DA28__",
AVR_MCU ("avr64da32", ARCH_AVRXMEGA2, AVR_ISA_FLMAP, "__AVR_AVR64DA32__", 0x6000, 0x0, 0x10000, 0)
AVR_MCU ("avr64da48", ARCH_AVRXMEGA2, AVR_ISA_FLMAP, "__AVR_AVR64DA48__", 0x6000, 0x0, 0x10000, 0)
AVR_MCU ("avr64da64", ARCH_AVRXMEGA2, AVR_ISA_FLMAP, "__AVR_AVR64DA64__", 0x6000, 0x0, 0x10000, 0)
+AVR_MCU ("avr64da28s", ARCH_AVRXMEGA2, AVR_ISA_FLMAP, "__AVR_AVR64DA28S__", 0x6000, 0x0, 0x10000, 0)
+AVR_MCU ("avr64da32s", ARCH_AVRXMEGA2, AVR_ISA_FLMAP, "__AVR_AVR64DA32S__", 0x6000, 0x0, 0x10000, 0)
+AVR_MCU ("avr64da48s", ARCH_AVRXMEGA2, AVR_ISA_FLMAP, "__AVR_AVR64DA48S__", 0x6000, 0x0, 0x10000, 0)
+AVR_MCU ("avr64da64s", ARCH_AVRXMEGA2, AVR_ISA_FLMAP, "__AVR_AVR64DA64S__", 0x6000, 0x0, 0x10000, 0)
AVR_MCU ("avr64db28", ARCH_AVRXMEGA2, AVR_ISA_FLMAP, "__AVR_AVR64DB28__", 0x6000, 0x0, 0x10000, 0)
AVR_MCU ("avr64db32", ARCH_AVRXMEGA2, AVR_ISA_FLMAP, "__AVR_AVR64DB32__", 0x6000, 0x0, 0x10000, 0)
AVR_MCU ("avr64db48", ARCH_AVRXMEGA2, AVR_ISA_FLMAP, "__AVR_AVR64DB48__", 0x6000, 0x0, 0x10000, 0)
@@ -389,6 +393,9 @@ AVR_MCU ("avr16du32", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_AVR16DU32__",
AVR_MCU ("avr32da28", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_AVR32DA28__", 0x7000, 0x0, 0x8000, 0x8000)
AVR_MCU ("avr32da32", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_AVR32DA32__", 0x7000, 0x0, 0x8000, 0x8000)
AVR_MCU ("avr32da48", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_AVR32DA48__", 0x7000, 0x0, 0x8000, 0x8000)
+AVR_MCU ("avr32da28s", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_AVR32DA28S__", 0x7000, 0x0, 0x8000, 0x8000)
+AVR_MCU ("avr32da32s", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_AVR32DA32S__", 0x7000, 0x0, 0x8000, 0x8000)
+AVR_MCU ("avr32da48s", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_AVR32DA48S__", 0x7000, 0x0, 0x8000, 0x8000)
AVR_MCU ("avr32db28", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_AVR32DB28__", 0x7000, 0x0, 0x8000, 0x8000)
AVR_MCU ("avr32db32", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_AVR32DB32__", 0x7000, 0x0, 0x8000, 0x8000)
AVR_MCU ("avr32db48", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_AVR32DB48__", 0x7000, 0x0, 0x8000, 0x8000)
@@ -427,6 +434,10 @@ AVR_MCU ("avr128da28", ARCH_AVRXMEGA4, AVR_ISA_FLMAP, "__AVR_AVR128DA28__"
AVR_MCU ("avr128da32", ARCH_AVRXMEGA4, AVR_ISA_FLMAP, "__AVR_AVR128DA32__", 0x4000, 0x0, 0x20000, 0)
AVR_MCU ("avr128da48", ARCH_AVRXMEGA4, AVR_ISA_FLMAP, "__AVR_AVR128DA48__", 0x4000, 0x0, 0x20000, 0)
AVR_MCU ("avr128da64", ARCH_AVRXMEGA4, AVR_ISA_FLMAP, "__AVR_AVR128DA64__", 0x4000, 0x0, 0x20000, 0)
+AVR_MCU ("avr128da28s", ARCH_AVRXMEGA4, AVR_ISA_FLMAP, "__AVR_AVR128DA28S__", 0x4000, 0x0, 0x20000, 0)
+AVR_MCU ("avr128da32s", ARCH_AVRXMEGA4, AVR_ISA_FLMAP, "__AVR_AVR128DA32S__", 0x4000, 0x0, 0x20000, 0)
+AVR_MCU ("avr128da48s", ARCH_AVRXMEGA4, AVR_ISA_FLMAP, "__AVR_AVR128DA48S__", 0x4000, 0x0, 0x20000, 0)
+AVR_MCU ("avr128da64s", ARCH_AVRXMEGA4, AVR_ISA_FLMAP, "__AVR_AVR128DA64S__", 0x4000, 0x0, 0x20000, 0)
AVR_MCU ("avr128db28", ARCH_AVRXMEGA4, AVR_ISA_FLMAP, "__AVR_AVR128DB28__", 0x4000, 0x0, 0x20000, 0)
AVR_MCU ("avr128db32", ARCH_AVRXMEGA4, AVR_ISA_FLMAP, "__AVR_AVR128DB32__", 0x4000, 0x0, 0x20000, 0)
AVR_MCU ("avr128db48", ARCH_AVRXMEGA4, AVR_ISA_FLMAP, "__AVR_AVR128DB48__", 0x4000, 0x0, 0x20000, 0)
--- a/src/gcc/config/avr/specs.h
+++ b/src/gcc/config/avr/specs.h
@@ -57,7 +57,7 @@ along with GCC; see the file COPYING3. If not see
"%(asm_errata_skip) "
#define LINK_RELAX_SPEC \
- "%{mrelax:--relax} "
+ "%{!r:%{mrelax:--relax}} "
#undef LINK_SPEC
#define LINK_SPEC \
--- a/src/gcc/config/i386/i386.cc
+++ b/src/gcc/config/i386/i386.cc
@@ -12119,6 +12119,28 @@ static GTY(()) rtx ix86_tls_symbol;
static rtx
ix86_tls_get_addr (void)
{
+ if (cfun->machine->call_saved_registers
+ == TYPE_NO_CALLER_SAVED_REGISTERS)
+ {
+ /* __tls_get_addr doesn't preserve vector registers. When a
+ function with no_caller_saved_registers attribute calls
+ __tls_get_addr, YMM and ZMM registers will be clobbered.
+ Issue an error and suggest -mtls-dialect=gnu2 in this case. */
+ if (cfun->machine->func_type == TYPE_NORMAL)
+ error (G_("%<-mtls-dialect=gnu2%> must be used with a function"
+ " with the %<no_caller_saved_registers%> attribute"));
+ else
+ error (cfun->machine->func_type == TYPE_EXCEPTION
+ ? G_("%<-mtls-dialect=gnu2%> must be used with an"
+ " exception service routine")
+ : G_("%<-mtls-dialect=gnu2%> must be used with an"
+ " interrupt service routine"));
+ /* Don't issue the same error twice. */
+ cfun->machine->func_type = TYPE_NORMAL;
+ cfun->machine->call_saved_registers
+ = TYPE_DEFAULT_CALL_SAVED_REGISTERS;
+ }
+
if (!ix86_tls_symbol)
{
const char *sym
@@ -12218,11 +12240,12 @@ legitimize_tls_address (rtx x, enum tls_model model, bool for_mov)
if (TARGET_64BIT)
{
rtx rax = gen_rtx_REG (Pmode, AX_REG);
+ rtx rdi = gen_rtx_REG (Pmode, DI_REG);
rtx_insn *insns;
start_sequence ();
emit_call_insn
- (gen_tls_global_dynamic_64 (Pmode, rax, x, caddr));
+ (gen_tls_global_dynamic_64 (Pmode, rax, x, caddr, rdi));
insns = get_insns ();
end_sequence ();
@@ -12272,12 +12295,13 @@ legitimize_tls_address (rtx x, enum tls_model model, bool for_mov)
if (TARGET_64BIT)
{
rtx rax = gen_rtx_REG (Pmode, AX_REG);
+ rtx rdi = gen_rtx_REG (Pmode, DI_REG);
rtx_insn *insns;
rtx eqv;
start_sequence ();
emit_call_insn
- (gen_tls_local_dynamic_base_64 (Pmode, rax, caddr));
+ (gen_tls_local_dynamic_base_64 (Pmode, rax, caddr, rdi));
insns = get_insns ();
end_sequence ();
--- a/src/gcc/config/i386/i386.h
+++ b/src/gcc/config/i386/i386.h
@@ -2415,12 +2415,14 @@ constexpr wide_int_bitmask PTA_GOLDMONT_PLUS = PTA_GOLDMONT | PTA_RDPID
| PTA_SGX | PTA_PTWRITE;
constexpr wide_int_bitmask PTA_TREMONT = PTA_GOLDMONT_PLUS | PTA_CLWB
| PTA_GFNI | PTA_MOVDIRI | PTA_MOVDIR64B | PTA_CLDEMOTE | PTA_WAITPKG;
-constexpr wide_int_bitmask PTA_ALDERLAKE = PTA_TREMONT | PTA_ADX | PTA_AVX
+constexpr wide_int_bitmask PTA_ALDERLAKE = PTA_GOLDMONT_PLUS | PTA_CLWB
+ | PTA_GFNI | PTA_MOVDIRI | PTA_MOVDIR64B | PTA_WAITPKG | PTA_ADX | PTA_AVX
| PTA_AVX2 | PTA_BMI | PTA_BMI2 | PTA_F16C | PTA_FMA | PTA_LZCNT
| PTA_PCONFIG | PTA_PKU | PTA_VAES | PTA_VPCLMULQDQ | PTA_SERIALIZE
| PTA_HRESET | PTA_KL | PTA_WIDEKL | PTA_AVXVNNI;
-constexpr wide_int_bitmask PTA_SIERRAFOREST = PTA_ALDERLAKE | PTA_AVXIFMA
- | PTA_AVXVNNIINT8 | PTA_AVXNECONVERT | PTA_CMPCCXADD | PTA_ENQCMD | PTA_UINTR;
+constexpr wide_int_bitmask PTA_SIERRAFOREST = PTA_ALDERLAKE | PTA_CLDEMOTE
+ | PTA_AVXIFMA | PTA_AVXVNNIINT8 | PTA_AVXNECONVERT | PTA_CMPCCXADD
+ | PTA_ENQCMD | PTA_UINTR;
constexpr wide_int_bitmask PTA_GRANITERAPIDS = PTA_SAPPHIRERAPIDS | PTA_AMX_FP16
| PTA_PREFETCHI;
constexpr wide_int_bitmask PTA_GRANITERAPIDS_D = PTA_GRANITERAPIDS
@@ -2430,10 +2432,11 @@ constexpr wide_int_bitmask PTA_ARROWLAKE = PTA_ALDERLAKE | PTA_AVXIFMA
| PTA_AVXVNNIINT8 | PTA_AVXNECONVERT | PTA_CMPCCXADD | PTA_UINTR;
constexpr wide_int_bitmask PTA_ARROWLAKE_S = PTA_ARROWLAKE | PTA_AVXVNNIINT16
| PTA_SHA512 | PTA_SM3 | PTA_SM4;
-constexpr wide_int_bitmask PTA_CLEARWATERFOREST = PTA_SIERRAFOREST
- | PTA_AVXVNNIINT16 | PTA_SHA512 | PTA_SM3 | PTA_SM4 | PTA_USER_MSR
- | PTA_PREFETCHI;
-constexpr wide_int_bitmask PTA_PANTHERLAKE = PTA_ARROWLAKE_S | PTA_PREFETCHI;
+constexpr wide_int_bitmask PTA_CLEARWATERFOREST =
+ (PTA_SIERRAFOREST & (~(PTA_KL | PTA_WIDEKL))) | PTA_AVXVNNIINT16 | PTA_SHA512
+ | PTA_SM3 | PTA_SM4 | PTA_USER_MSR | PTA_PREFETCHI;
+constexpr wide_int_bitmask PTA_PANTHERLAKE =
+ (PTA_ARROWLAKE_S & (~(PTA_KL | PTA_WIDEKL))) | PTA_PREFETCHI;
constexpr wide_int_bitmask PTA_KNM = PTA_KNL | PTA_AVX5124VNNIW
| PTA_AVX5124FMAPS | PTA_AVX512VPOPCNTDQ;
--- a/src/gcc/config/i386/i386.md
+++ b/src/gcc/config/i386/i386.md
@@ -2332,22 +2332,32 @@ (define_insn "*mov<mode>_xor"
(set_attr "mode" "SI")
(set_attr "length_immediate" "0")])
-(define_insn "*mov<mode>_and"
+;; Generate shorter "and $0,mem" for -Oz. Split it to "mov $0,mem"
+;; otherwise.
+(define_insn_and_split "*mov<mode>_and"
[(set (match_operand:SWI248 0 "memory_operand" "=m")
(match_operand:SWI248 1 "const0_operand"))
(clobber (reg:CC FLAGS_REG))]
"reload_completed"
"and{<imodesuffix>}\t{%1, %0|%0, %1}"
+ "&& !(optimize_insn_for_size_p () && optimize_size > 1)"
+ [(set (match_dup 0) (match_dup 1))]
+ ""
[(set_attr "type" "alu1")
(set_attr "mode" "<MODE>")
(set_attr "length_immediate" "1")])
-(define_insn "*mov<mode>_or"
+;; Generate shorter "or $-1,mem" for -Oz. Split it to "mov $-1,mem"
+;; otherwise.
+(define_insn_and_split "*mov<mode>_or"
[(set (match_operand:SWI248 0 "nonimmediate_operand" "=rm")
(match_operand:SWI248 1 "constm1_operand"))
(clobber (reg:CC FLAGS_REG))]
"reload_completed"
"or{<imodesuffix>}\t{%1, %0|%0, %1}"
+ "&& !(optimize_insn_for_size_p () && optimize_size > 1)"
+ [(set (match_dup 0) (match_dup 1))]
+ ""
[(set_attr "type" "alu1")
(set_attr "mode" "<MODE>")
(set_attr "length_immediate" "1")])
@@ -2852,6 +2862,8 @@ (define_peephole2
(match_operand:SWI248 1 "const_int_operand"))]
"optimize_insn_for_size_p () && optimize_size > 1
&& operands[1] != const0_rtx
+ && (operands[1] != constm1_rtx
+ || (<MODE>mode == DImode && LEGACY_INT_REG_P (operands[0])))
&& IN_RANGE (INTVAL (operands[1]), -128, 127)
&& !ix86_red_zone_used
&& REGNO (operands[0]) != SP_REG"
@@ -21114,7 +21126,8 @@ (define_insn "*tls_global_dynamic_64_<mode>"
(match_operand 3)))
(unspec:P [(match_operand 1 "tls_symbolic_operand")
(reg:P SP_REG)]
- UNSPEC_TLS_GD)]
+ UNSPEC_TLS_GD)
+ (clobber (match_operand:P 4 "register_operand" "=D"))]
"TARGET_64BIT"
{
if (!TARGET_X32)
@@ -21131,7 +21144,7 @@ (define_insn "*tls_global_dynamic_64_<mode>"
Use data16 prefix instead, which doesn't have this problem. */
fputs ("\tdata16", asm_out_file);
output_asm_insn
- ("lea{q}\t{%E1@tlsgd(%%rip), %%rdi|rdi, %E1@tlsgd[rip]}", operands);
+ ("lea{q}\t{%E1@tlsgd(%%rip), %q4|%q4, %E1@tlsgd[rip]}", operands);
if (TARGET_SUN_TLS || flag_plt || !HAVE_AS_IX86_TLS_GET_ADDR_GOT)
fputs (ASM_SHORT "0x6666\n", asm_out_file);
else
@@ -21155,14 +21168,15 @@ (define_insn "*tls_global_dynamic_64_largepic"
(match_operand 4)))
(unspec:DI [(match_operand 1 "tls_symbolic_operand")
(reg:DI SP_REG)]
- UNSPEC_TLS_GD)]
+ UNSPEC_TLS_GD)
+ (clobber (match_operand:DI 5 "register_operand" "=D"))]
"TARGET_64BIT && ix86_cmodel == CM_LARGE_PIC && !TARGET_PECOFF
&& GET_CODE (operands[3]) == CONST
&& GET_CODE (XEXP (operands[3], 0)) == UNSPEC
&& XINT (XEXP (operands[3], 0), 1) == UNSPEC_PLTOFF"
{
output_asm_insn
- ("lea{q}\t{%E1@tlsgd(%%rip), %%rdi|rdi, %E1@tlsgd[rip]}", operands);
+ ("lea{q}\t{%E1@tlsgd(%%rip), %5|%5, %E1@tlsgd[rip]}", operands);
output_asm_insn ("movabs{q}\t{%3, %%rax|rax, %3}", operands);
output_asm_insn ("add{q}\t{%2, %%rax|rax, %2}", operands);
return "call\t{*%%rax|rax}";
@@ -21178,7 +21192,8 @@ (define_expand "@tls_global_dynamic_64_<mode>"
(const_int 0)))
(unspec:P [(match_operand 1 "tls_symbolic_operand")
(reg:P SP_REG)]
- UNSPEC_TLS_GD)])]
+ UNSPEC_TLS_GD)
+ (clobber (match_operand:P 3 "register_operand"))])]
"TARGET_64BIT"
"ix86_tls_descriptor_calls_expanded_in_cfun = true;")
@@ -21229,11 +21244,12 @@ (define_insn "*tls_local_dynamic_base_64_<mode>"
(call:P
(mem:QI (match_operand 1 "constant_call_address_operand" "Bz"))
(match_operand 2)))
- (unspec:P [(reg:P SP_REG)] UNSPEC_TLS_LD_BASE)]
+ (unspec:P [(reg:P SP_REG)] UNSPEC_TLS_LD_BASE)
+ (clobber (match_operand:P 3 "register_operand" "=D"))]
"TARGET_64BIT"
{
output_asm_insn
- ("lea{q}\t{%&@tlsld(%%rip), %%rdi|rdi, %&@tlsld[rip]}", operands);
+ ("lea{q}\t{%&@tlsld(%%rip), %q3|%q3, %&@tlsld[rip]}", operands);
if (TARGET_SUN_TLS)
return "call\t%p1@plt";
if (flag_plt || !HAVE_AS_IX86_TLS_GET_ADDR_GOT)
@@ -21249,14 +21265,15 @@ (define_insn "*tls_local_dynamic_base_64_largepic"
(mem:QI (plus:DI (match_operand:DI 1 "register_operand" "b")
(match_operand:DI 2 "immediate_operand" "i")))
(match_operand 3)))
- (unspec:DI [(reg:DI SP_REG)] UNSPEC_TLS_LD_BASE)]
+ (unspec:DI [(reg:DI SP_REG)] UNSPEC_TLS_LD_BASE)
+ (clobber (match_operand:DI 4 "register_operand" "=D"))]
"TARGET_64BIT && ix86_cmodel == CM_LARGE_PIC && !TARGET_PECOFF
&& GET_CODE (operands[2]) == CONST
&& GET_CODE (XEXP (operands[2], 0)) == UNSPEC
&& XINT (XEXP (operands[2], 0), 1) == UNSPEC_PLTOFF"
{
output_asm_insn
- ("lea{q}\t{%&@tlsld(%%rip), %%rdi|rdi, %&@tlsld[rip]}", operands);
+ ("lea{q}\t{%&@tlsld(%%rip), %4|%4, %&@tlsld[rip]}", operands);
output_asm_insn ("movabs{q}\t{%2, %%rax|rax, %2}", operands);
output_asm_insn ("add{q}\t{%1, %%rax|rax, %1}", operands);
return "call\t{*%%rax|rax}";
@@ -21270,7 +21287,8 @@ (define_expand "@tls_local_dynamic_base_64_<mode>"
(call:P
(mem:QI (match_operand 1))
(const_int 0)))
- (unspec:P [(reg:P SP_REG)] UNSPEC_TLS_LD_BASE)])]
+ (unspec:P [(reg:P SP_REG)] UNSPEC_TLS_LD_BASE)
+ (clobber (match_operand:P 2 "register_operand"))])]
"TARGET_64BIT"
"ix86_tls_descriptor_calls_expanded_in_cfun = true;")
--- a/src/gcc/config/i386/sse.md
+++ b/src/gcc/config/i386/sse.md
@@ -20793,6 +20793,19 @@ (define_insn "vec_concatv2di"
(const_string "orig")))
(set_attr "mode" "TI,TI,TI,TI,TI,TI,V4SF,V2SF,V2SF")])
+;; Eliminate redundancy caused by
+;; /* Special case TImode to 128-bit vector conversions via V2DI. */
+;; in ix86_expand_vector_move
+
+(define_split
+ [(set (match_operand:V2DI 0 "register_operand")
+ (vec_concat:V2DI
+ (subreg:DI (match_operand:TI 1 "register_operand") 0)
+ (subreg:DI (match_dup 1) 8)))]
+ "TARGET_SSE2 && ix86_pre_reload_split ()"
+ [(set (match_dup 0)
+ (subreg:V2DI (match_dup 1) 0))])
+
(define_insn "*vec_concatv2di_0"
[(set (match_operand:V2DI 0 "register_operand" "=v,v ,x")
(vec_concat:V2DI
--- a/src/gcc/config/loongarch/lasx.md
+++ b/src/gcc/config/loongarch/lasx.md
@@ -2337,9 +2337,9 @@ (define_insn "lasx_xvssub_u_<lasxfmt_u>"
[(set_attr "type" "simd_int_arith")
(set_attr "mode" "<MODE>")])
-(define_insn "lasx_xvshuf_<lasxfmt_f>"
+(define_insn "@lasx_xvshuf_<lasxfmt_f>"
[(set (match_operand:LASX_DWH 0 "register_operand" "=f")
- (unspec:LASX_DWH [(match_operand:LASX_DWH 1 "register_operand" "0")
+ (unspec:LASX_DWH [(match_operand:<VIMODE> 1 "register_operand" "0")
(match_operand:LASX_DWH 2 "register_operand" "f")
(match_operand:LASX_DWH 3 "register_operand" "f")]
UNSPEC_LASX_XVSHUF))]
--- a/src/gcc/config/loongarch/loongarch-def.h
+++ b/src/gcc/config/loongarch/loongarch-def.h
@@ -78,12 +78,10 @@ extern loongarch_def_array<const char *, N_ISA_EXT_TYPES>
/* Base ABI */
-enum {
- ABI_BASE_LP64D = 0,
- ABI_BASE_LP64F = 1,
- ABI_BASE_LP64S = 2,
- N_ABI_BASE_TYPES = 3
-};
+#define ABI_BASE_LP64D 0
+#define ABI_BASE_LP64F 1
+#define ABI_BASE_LP64S 2
+#define N_ABI_BASE_TYPES 3
extern loongarch_def_array<const char *, N_ABI_BASE_TYPES>
loongarch_abi_base_strings;
--- a/src/gcc/config/loongarch/loongarch.cc
+++ b/src/gcc/config/loongarch/loongarch.cc
@@ -4280,6 +4280,7 @@ loongarch_vector_costs::add_stmt_cost (int count, vect_cost_for_stmt kind,
break;
}
else if (TARGET_RECIP_VEC_DIV
+ && vectype
&& gimple_code (stmt_info->stmt) == GIMPLE_ASSIGN)
{
machine_mode mode = TYPE_MODE (vectype);
@@ -8199,7 +8200,7 @@ static bool
loongarch_try_expand_lsx_vshuf_const (struct expand_vec_perm_d *d)
{
int i;
- rtx target, op0, op1, sel, tmp;
+ rtx target, op0, op1;
rtx rperm[MAX_VECT_LEN];
if (GET_MODE_SIZE (d->vmode) == 16)
@@ -8218,47 +8219,23 @@ loongarch_try_expand_lsx_vshuf_const (struct expand_vec_perm_d *d)
for (i = 0; i < d->nelt; i += 1)
rperm[i] = GEN_INT (d->perm[i]);
- if (d->vmode == E_V2DFmode)
- {
- sel = gen_rtx_CONST_VECTOR (E_V2DImode, gen_rtvec_v (d->nelt, rperm));
- tmp = simplify_gen_subreg (E_V2DImode, d->target, d->vmode, 0);
- emit_move_insn (tmp, sel);
- }
- else if (d->vmode == E_V4SFmode)
- {
- sel = gen_rtx_CONST_VECTOR (E_V4SImode, gen_rtvec_v (d->nelt, rperm));
- tmp = simplify_gen_subreg (E_V4SImode, d->target, d->vmode, 0);
- emit_move_insn (tmp, sel);
- }
+ machine_mode sel_mode = related_int_vector_mode (d->vmode)
+ .require ();
+ rtvec sel_v = gen_rtvec_v (d->nelt, rperm);
+
+ /* Despite vshuf.* (except vshuf.b) needs sel == target, we cannot
+ load sel into target right now: here we are dealing with
+ pseudo regs, and target may be the same pseudo as one of op0
+ or op1. Then we'd clobber the input. Instead, we use a new
+ pseudo reg here. The reload pass will look at the constraint
+ of vshuf.* and move sel into target first if needed. */
+ rtx sel = force_reg (sel_mode,
+ gen_rtx_CONST_VECTOR (sel_mode, sel_v));
+
+ if (d->vmode == E_V16QImode)
+ emit_insn (gen_lsx_vshuf_b (target, op1, op0, sel));
else
- {
- sel = gen_rtx_CONST_VECTOR (d->vmode, gen_rtvec_v (d->nelt, rperm));
- emit_move_insn (d->target, sel);
- }
-
- switch (d->vmode)
- {
- case E_V2DFmode:
- emit_insn (gen_lsx_vshuf_d_f (target, target, op1, op0));
- break;
- case E_V2DImode:
- emit_insn (gen_lsx_vshuf_d (target, target, op1, op0));
- break;
- case E_V4SFmode:
- emit_insn (gen_lsx_vshuf_w_f (target, target, op1, op0));
- break;
- case E_V4SImode:
- emit_insn (gen_lsx_vshuf_w (target, target, op1, op0));
- break;
- case E_V8HImode:
- emit_insn (gen_lsx_vshuf_h (target, target, op1, op0));
- break;
- case E_V16QImode:
- emit_insn (gen_lsx_vshuf_b (target, op1, op0, target));
- break;
- default:
- break;
- }
+ emit_insn (gen_lsx_vshuf (d->vmode, target, sel, op1, op0));
return true;
}
@@ -9254,7 +9231,7 @@ loongarch_expand_vec_perm_const (struct expand_vec_perm_d *d)
bool flag = false;
unsigned int i;
unsigned char idx;
- rtx target, op0, op1, sel, tmp;
+ rtx target, op0, op1;
rtx rperm[MAX_VECT_LEN];
unsigned int remapped[MAX_VECT_LEN];
unsigned char perm2[MAX_VECT_LEN];
@@ -9434,63 +9411,23 @@ loongarch_expand_vec_perm_const (struct expand_vec_perm_d *d)
expand_perm_const_end:
if (flag)
{
- /* Copy selector vector from memory to vector register for later insn
- gen function.
- If vector's element in floating point value, we cannot fit
- selector argument into insn gen function directly, because of the
- insn template definition. As a solution, generate a integral mode
- subreg of target, then copy selector vector (that is in integral
- mode) to this subreg. */
- switch (d->vmode)
- {
- case E_V4DFmode:
- sel = gen_rtx_CONST_VECTOR (E_V4DImode, gen_rtvec_v (d->nelt,
- rperm));
- tmp = simplify_gen_subreg (E_V4DImode, d->target, d->vmode, 0);
- emit_move_insn (tmp, sel);
- break;
- case E_V8SFmode:
- sel = gen_rtx_CONST_VECTOR (E_V8SImode, gen_rtvec_v (d->nelt,
- rperm));
- tmp = simplify_gen_subreg (E_V8SImode, d->target, d->vmode, 0);
- emit_move_insn (tmp, sel);
- break;
- default:
- sel = gen_rtx_CONST_VECTOR (d->vmode, gen_rtvec_v (d->nelt,
- rperm));
- emit_move_insn (d->target, sel);
- break;
- }
-
target = d->target;
op0 = d->op0;
op1 = d->one_vector_p ? d->op0 : d->op1;
- /* We FINALLY can generate xvshuf.* insn. */
- switch (d->vmode)
- {
- case E_V4DFmode:
- emit_insn (gen_lasx_xvshuf_d_f (target, target, op1, op0));
- break;
- case E_V4DImode:
- emit_insn (gen_lasx_xvshuf_d (target, target, op1, op0));
- break;
- case E_V8SFmode:
- emit_insn (gen_lasx_xvshuf_w_f (target, target, op1, op0));
- break;
- case E_V8SImode:
- emit_insn (gen_lasx_xvshuf_w (target, target, op1, op0));
- break;
- case E_V16HImode:
- emit_insn (gen_lasx_xvshuf_h (target, target, op1, op0));
- break;
- case E_V32QImode:
- emit_insn (gen_lasx_xvshuf_b (target, op1, op0, target));
- break;
- default:
- gcc_unreachable ();
- break;
- }
+ machine_mode sel_mode = related_int_vector_mode (d->vmode)
+ .require ();
+ rtvec sel_v = gen_rtvec_v (d->nelt, rperm);
+
+ /* See the comment in loongarch_expand_lsx_shuffle for why
+ we don't simply use a SUBREG to pun target. */
+ rtx sel = force_reg (sel_mode,
+ gen_rtx_CONST_VECTOR (sel_mode, sel_v));
+
+ if (d->vmode == E_V32QImode)
+ emit_insn (gen_lasx_xvshuf_b (target, op1, op0, sel));
+ else
+ emit_insn (gen_lasx_xvshuf (d->vmode, target, sel, op1, op0));
return true;
}
@@ -11014,6 +10951,18 @@ loongarch_c_mode_for_suffix (char suffix)
return VOIDmode;
}
+/* Implement TARGET_COMPUTE_PRESSURE_CLASSES. */
+
+static int
+loongarch_compute_pressure_classes (reg_class *classes)
+{
+ int i = 0;
+ classes[i++] = GENERAL_REGS;
+ classes[i++] = FP_REGS;
+ classes[i++] = FCC_REGS;
+ return i;
+}
+
/* Initialize the GCC target structure. */
#undef TARGET_ASM_ALIGNED_HI_OP
#define TARGET_ASM_ALIGNED_HI_OP "\t.half\t"
@@ -11276,6 +11225,9 @@ loongarch_c_mode_for_suffix (char suffix)
#undef TARGET_C_MODE_FOR_SUFFIX
#define TARGET_C_MODE_FOR_SUFFIX loongarch_c_mode_for_suffix
+#undef TARGET_COMPUTE_PRESSURE_CLASSES
+#define TARGET_COMPUTE_PRESSURE_CLASSES loongarch_compute_pressure_classes
+
struct gcc_target targetm = TARGET_INITIALIZER;
#include "gt-loongarch.h"
--- a/src/gcc/config/loongarch/lsx.md
+++ b/src/gcc/config/loongarch/lsx.md
@@ -689,9 +689,9 @@ (define_expand "vec_perm<mode>"
DONE;
})
-(define_insn "lsx_vshuf_<lsxfmt_f>"
+(define_insn "@lsx_vshuf_<lsxfmt_f>"
[(set (match_operand:LSX_DWH 0 "register_operand" "=f")
- (unspec:LSX_DWH [(match_operand:LSX_DWH 1 "register_operand" "0")
+ (unspec:LSX_DWH [(match_operand:<VIMODE> 1 "register_operand" "0")
(match_operand:LSX_DWH 2 "register_operand" "f")
(match_operand:LSX_DWH 3 "register_operand" "f")]
UNSPEC_LSX_VSHUF))]
--- a/src/gcc/config/microblaze/microblaze.cc
+++ b/src/gcc/config/microblaze/microblaze.cc
@@ -239,6 +239,10 @@ section *sdata2_section;
#define TARGET_HAVE_TLS true
#endif
+/* MicroBlaze does not do speculative execution. */
+#undef TARGET_HAVE_SPECULATION_SAFE_VALUE
+#define TARGET_HAVE_SPECULATION_SAFE_VALUE speculation_safe_value_not_needed
+
/* Return truth value if a CONST_DOUBLE is ok to be a legitimate constant. */
static bool
microblaze_const_double_ok (rtx op, machine_mode mode)
--- a/src/gcc/config/rs6000/rs6000.md
+++ b/src/gcc/config/rs6000/rs6000.md
@@ -6897,7 +6897,7 @@ (define_insn "floatdidf2"
(define_insn "floatti<mode>2"
[(set (match_operand:IEEE128 0 "vsx_register_operand" "=v")
(float:IEEE128 (match_operand:TI 1 "vsx_register_operand" "v")))]
- "TARGET_POWER10"
+ "TARGET_POWER10 && TARGET_FLOAT128_HW"
{
return "xscvsqqp %0,%1";
}
@@ -6906,7 +6906,7 @@ (define_insn "floatti<mode>2"
(define_insn "floatunsti<mode>2"
[(set (match_operand:IEEE128 0 "vsx_register_operand" "=v")
(unsigned_float:IEEE128 (match_operand:TI 1 "vsx_register_operand" "v")))]
- "TARGET_POWER10"
+ "TARGET_POWER10 && TARGET_FLOAT128_HW"
{
return "xscvuqqp %0,%1";
}
@@ -6915,7 +6915,7 @@ (define_insn "floatunsti<mode>2"
(define_insn "fix_trunc<mode>ti2"
[(set (match_operand:TI 0 "vsx_register_operand" "=v")
(fix:TI (match_operand:IEEE128 1 "vsx_register_operand" "v")))]
- "TARGET_POWER10"
+ "TARGET_POWER10 && TARGET_FLOAT128_HW"
{
return "xscvqpsqz %0,%1";
}
--- a/src/gcc/config/rs6000/vsx.md
+++ b/src/gcc/config/rs6000/vsx.md
@@ -5132,7 +5132,7 @@ (define_insn "xsxexpqp_<IEEE128:mode>_<V2DI_DI:mode>"
(unspec:V2DI_DI
[(match_operand:IEEE128 1 "altivec_register_operand" "v")]
UNSPEC_VSX_SXEXPDP))]
- "TARGET_P9_VECTOR"
+ "TARGET_FLOAT128_HW"
"xsxexpqp %0,%1"
[(set_attr "type" "vecmove")])
@@ -5151,7 +5151,7 @@ (define_insn "xsxsigqp_<IEEE128:mode>_<VEC_TI:mode>"
(unspec:VEC_TI [(match_operand:IEEE128 1
"altivec_register_operand" "v")]
UNSPEC_VSX_SXSIG))]
- "TARGET_P9_VECTOR"
+ "TARGET_FLOAT128_HW"
"xsxsigqp %0,%1"
[(set_attr "type" "vecmove")])
@@ -5171,7 +5171,7 @@ (define_insn "xsiexpqpf_<mode>"
[(match_operand:IEEE128 1 "altivec_register_operand" "v")
(match_operand:DI 2 "altivec_register_operand" "v")]
UNSPEC_VSX_SIEXPQP))]
- "TARGET_P9_VECTOR"
+ "TARGET_FLOAT128_HW"
"xsiexpqp %0,%1,%2"
[(set_attr "type" "vecmove")])
@@ -5183,7 +5183,7 @@ (define_insn "xsiexpqp_<IEEE128:mode>_<V2DI_DI:mode>"
(match_operand:V2DI_DI 2
"altivec_register_operand" "v")]
UNSPEC_VSX_SIEXPQP))]
- "TARGET_P9_VECTOR"
+ "TARGET_FLOAT128_HW"
"xsiexpqp %0,%1,%2"
[(set_attr "type" "vecmove")])
@@ -5253,7 +5253,7 @@ (define_expand "xscmpexpqp_<code>_<mode>"
(set (match_operand:SI 0 "register_operand" "=r")
(CMP_TEST:SI (match_dup 3)
(const_int 0)))]
- "TARGET_P9_VECTOR"
+ "TARGET_FLOAT128_HW"
{
if (<CODE> == UNORDERED && !HONOR_NANS (<MODE>mode))
{
@@ -5271,7 +5271,7 @@ (define_insn "*xscmpexpqp"
(match_operand:IEEE128 2 "altivec_register_operand" "v")]
UNSPEC_VSX_SCMPEXPQP)
(match_operand:SI 3 "zero_constant" "j")))]
- "TARGET_P9_VECTOR"
+ "TARGET_FLOAT128_HW"
"xscmpexpqp %0,%1,%2"
[(set_attr "type" "fpcompare")])
@@ -5329,7 +5329,7 @@ (define_expand "xststdcnegqp_<mode>"
(set (match_operand:SI 0 "register_operand" "=r")
(lt:SI (match_dup 2)
(const_int 0)))]
- "TARGET_P9_VECTOR"
+ "TARGET_FLOAT128_HW"
{
operands[2] = gen_reg_rtx (CCFPmode);
})
--- a/src/gcc/config/s390/s390.md
+++ b/src/gcc/config/s390/s390.md
@@ -3392,7 +3392,7 @@ (define_split
(match_operand:BLK 1 "memory_operand" ""))
(use (match_operand 2 "const_int_operand" ""))
(use (match_operand 3 "immediate_operand" ""))
- (clobber (scratch))]
+ (clobber (match_scratch 4))]
"reload_completed"
[(parallel
[(set (match_dup 0) (match_dup 1))
@@ -3404,7 +3404,7 @@ (define_split
(match_operand:BLK 1 "memory_operand" ""))
(use (match_operand 2 "register_operand" ""))
(use (match_operand 3 "memory_operand" ""))
- (clobber (scratch))]
+ (clobber (match_scratch 4))]
"reload_completed"
[(parallel
[(unspec [(match_dup 2) (match_dup 3)
@@ -3418,14 +3418,14 @@ (define_split
(match_operand:BLK 1 "memory_operand" ""))
(use (match_operand 2 "register_operand" ""))
(use (const:BLK (unspec:BLK [(const_int 0)] UNSPEC_INSN)))
- (clobber (scratch))]
+ (clobber (match_scratch 3))]
"TARGET_Z10 && reload_completed"
[(parallel
[(unspec [(match_dup 2) (const_int 0)
- (label_ref (match_dup 3))] UNSPEC_EXECUTE)
+ (label_ref (match_dup 4))] UNSPEC_EXECUTE)
(set (match_dup 0) (match_dup 1))
(use (const_int 1))])]
- "operands[3] = gen_label_rtx ();")
+ "operands[4] = gen_label_rtx ();")
(define_split
[(set (match_operand:BLK 0 "memory_operand" "")
@@ -3644,7 +3644,7 @@ (define_split
(const_int 0))
(use (match_operand 1 "const_int_operand" ""))
(use (match_operand 2 "immediate_operand" ""))
- (clobber (scratch))
+ (clobber (match_scratch 3))
(clobber (reg:CC CC_REGNUM))]
"reload_completed"
[(parallel
@@ -3658,7 +3658,7 @@ (define_split
(const_int 0))
(use (match_operand 1 "register_operand" ""))
(use (match_operand 2 "memory_operand" ""))
- (clobber (scratch))
+ (clobber (match_scratch 3))
(clobber (reg:CC CC_REGNUM))]
"reload_completed"
[(parallel
@@ -3674,7 +3674,7 @@ (define_split
(const_int 0))
(use (match_operand 1 "register_operand" ""))
(use (const:BLK (unspec:BLK [(const_int 0)] UNSPEC_INSN)))
- (clobber (scratch))
+ (clobber (match_scratch 2))
(clobber (reg:CC CC_REGNUM))]
"TARGET_Z10 && reload_completed"
[(parallel
@@ -3839,7 +3839,7 @@ (define_split
(match_operand:BLK 1 "memory_operand" "")))
(use (match_operand 2 "const_int_operand" ""))
(use (match_operand 3 "immediate_operand" ""))
- (clobber (scratch))]
+ (clobber (match_scratch 4))]
"reload_completed"
[(parallel
[(set (reg:CCU CC_REGNUM) (compare:CCU (match_dup 0) (match_dup 1)))
@@ -3852,7 +3852,7 @@ (define_split
(match_operand:BLK 1 "memory_operand" "")))
(use (match_operand 2 "register_operand" ""))
(use (match_operand 3 "memory_operand" ""))
- (clobber (scratch))]
+ (clobber (match_scratch 4))]
"reload_completed"
[(parallel
[(unspec [(match_dup 2) (match_dup 3)
@@ -3867,7 +3867,7 @@ (define_split
(match_operand:BLK 1 "memory_operand" "")))
(use (match_operand 2 "register_operand" ""))
(use (const:BLK (unspec:BLK [(const_int 0)] UNSPEC_INSN)))
- (clobber (scratch))]
+ (clobber (match_scratch 3))]
"TARGET_Z10 && reload_completed"
[(parallel
[(unspec [(match_dup 2) (const_int 0)
--- a/src/gcc/config/s390/vector.md
+++ b/src/gcc/config/s390/vector.md
@@ -938,7 +938,7 @@ (define_insn "tf_to_fprx2"
else
{
reg_pair += 2; // get rid of prefix %f
- snprintf (buf, sizeof (buf), "ldr\t%%f0,%%f1;vpdi\t%%%%v%s,%%v1,%%%%v%s,5", reg_pair, reg_pair);
+ snprintf (buf, sizeof (buf), "vlr\t%%v0,%%v1;vpdi\t%%%%v%s,%%v1,%%%%v%s,5", reg_pair, reg_pair);
output_asm_insn (buf, operands);
return "";
}
--- a/src/gcc/cp/ChangeLog
+++ b/src/gcc/cp/ChangeLog
@@ -1,3 +1,67 @@
+2025-08-08 Patrick Palka <ppalka@redhat.com>
+
+ Backported from master:
+ 2025-08-04 Patrick Palka <ppalka@redhat.com>
+
+ PR c++/120620
+ * constexpr.cc (cxx_dynamic_cast_fn_p): Return true only
+ for synthesized __dynamic_cast.
+
+2025-08-01 Jason Merrill <jason@redhat.com>
+
+ Backported from master:
+ 2025-07-31 Jason Merrill <jason@redhat.com>
+
+ PR c++/120800
+ * constexpr.cc (cxx_eval_vec_init_1): Suppress access control.
+
+2025-07-26 Jason Merrill <jason@redhat.com>
+
+ Backported from master:
+ 2025-07-15 Jason Merrill <jason@redhat.com>
+
+ PR c++/120577
+ * constexpr.cc (cxx_eval_call_expression): Set
+ CONSTRUCTOR_NO_CLEARING on initial value for ctor.
+ (cxx_eval_component_reference): Make value-initialization
+ of an aggregate member explicit.
+
+2025-07-03 Jakub Jelinek <jakub@redhat.com>
+
+ Backported from master:
+ 2025-07-03 Jakub Jelinek <jakub@redhat.com>
+
+ PR c++/120940
+ * typeck.cc (cp_build_array_ref): Fix a pasto.
+
+2025-07-03 Jakub Jelinek <jakub@redhat.com>
+
+ Backported from master:
+ 2025-07-01 Jakub Jelinek <jakub@redhat.com>
+
+ PR c++/120471
+ * typeck.cc (cp_build_array_ref) <case COND_EXPR>: If idx is not
+ INTEGER_CST, don't optimize the case (but cp_default_conversion on
+ array early if it has ARRAY_TYPE) or use
+ SAVE_EXPR <op0>, SAVE_EXPR <idx>, SAVE_EXPR <op0> as new op0 depending
+ on flag_strong_eval_order and whether op1 and op2 are arrays with
+ invariant address or tree invariant pointers. Formatting fixes.
+
+2025-06-02 Jason Merrill <jason@redhat.com>
+
+ PR c++/120123
+ * lambda.cc (nonlambda_method_basetype): Look through lambdas
+ even when current_class_ref is null.
+
+2025-05-27 Patrick Palka <ppalka@redhat.com>
+
+ Backported from master:
+ 2025-05-15 Patrick Palka <ppalka@redhat.com>
+
+ PR c++/120161
+ * pt.cc (unify) <case RECORD_TYPE>: When comparing specializations
+ of a non-primary template, still perform a type comparison.
+
2025-05-23 Release Manager
* GCC 14.3.0 released.
--- a/src/gcc/cp/constexpr.cc
+++ b/src/gcc/cp/constexpr.cc
@@ -2440,7 +2440,11 @@ cxx_dynamic_cast_fn_p (tree fndecl)
{
return (cxx_dialect >= cxx20
&& id_equal (DECL_NAME (fndecl), "__dynamic_cast")
- && CP_DECL_CONTEXT (fndecl) == abi_node);
+ && CP_DECL_CONTEXT (fndecl) == abi_node
+ /* Only consider implementation-detail __dynamic_cast calls that
+ correspond to a dynamic_cast, and ignore direct calls to
+ abi::__dynamic_cast. */
+ && DECL_ARTIFICIAL (fndecl));
}
/* Often, we have an expression in the form of address + offset, e.g.
@@ -3337,10 +3341,10 @@ cxx_eval_call_expression (const constexpr_ctx *ctx, tree t,
&& TREE_CODE (new_obj) == COMPONENT_REF
&& TREE_CODE (TREE_TYPE (TREE_OPERAND (new_obj, 0))) == UNION_TYPE)
{
+ tree ctor = build_constructor (TREE_TYPE (new_obj), NULL);
+ CONSTRUCTOR_NO_CLEARING (ctor) = true;
tree activate = build2 (INIT_EXPR, TREE_TYPE (new_obj),
- new_obj,
- build_constructor (TREE_TYPE (new_obj),
- NULL));
+ new_obj, ctor);
cxx_eval_constant_expression (ctx, activate,
lval, non_constant_p, overflow_p);
ggc_free (activate);
@@ -4731,6 +4735,16 @@ cxx_eval_component_reference (const constexpr_ctx *ctx, tree t,
}
/* If there's no explicit init for this field, it's value-initialized. */
+
+ if (AGGREGATE_TYPE_P (TREE_TYPE (t)))
+ {
+ /* As in cxx_eval_store_expression, insert an empty CONSTRUCTOR
+ and copy the flags. */
+ constructor_elt *e = get_or_insert_ctor_field (whole, part);
+ e->value = value = build_constructor (TREE_TYPE (part), NULL);
+ return value;
+ }
+
value = build_value_init (TREE_TYPE (t), tf_warning_or_error);
return cxx_eval_constant_expression (ctx, value,
lval,
@@ -5497,6 +5511,9 @@ cxx_eval_vec_init_1 (const constexpr_ctx *ctx, tree atype, tree init,
return cxx_eval_bare_aggregate (ctx, init, lval,
non_constant_p, overflow_p);
+ /* We already checked access when building the VEC_INIT_EXPR. */
+ deferring_access_check_sentinel acs (dk_deferred);
+
/* For the default constructor, build up a call to the default
constructor of the element type. We only need to handle class types
here, as for a constructor to be constexpr, all members must be
--- a/src/gcc/cp/lambda.cc
+++ b/src/gcc/cp/lambda.cc
@@ -1002,12 +1002,9 @@ current_nonlambda_function (void)
tree
nonlambda_method_basetype (void)
{
- if (!current_class_ref)
- return NULL_TREE;
-
tree type = current_class_type;
if (!type || !LAMBDA_TYPE_P (type))
- return type;
+ return current_class_ref ? type : NULL_TREE;
while (true)
{
--- a/src/gcc/cp/pt.cc
+++ b/src/gcc/cp/pt.cc
@@ -25299,10 +25299,10 @@ unify (tree tparms, tree targs, tree parm, tree arg, int strict,
INNERMOST_TEMPLATE_ARGS (CLASSTYPE_TI_ARGS (parm)),
INNERMOST_TEMPLATE_ARGS (CLASSTYPE_TI_ARGS (t)),
UNIFY_ALLOW_NONE, explain_p);
- else
- return unify_success (explain_p);
+ gcc_checking_assert (t == arg);
}
- else if (!same_type_ignoring_top_level_qualifiers_p (parm, arg))
+
+ if (!same_type_ignoring_top_level_qualifiers_p (parm, arg))
return unify_type_mismatch (explain_p, parm, arg);
return unify_success (explain_p);
--- a/src/gcc/cp/typeck.cc
+++ b/src/gcc/cp/typeck.cc
@@ -3967,13 +3967,129 @@ cp_build_array_ref (location_t loc, tree array, tree idx,
}
case COND_EXPR:
- ret = build_conditional_expr
- (loc, TREE_OPERAND (array, 0),
- cp_build_array_ref (loc, TREE_OPERAND (array, 1), idx,
- complain),
- cp_build_array_ref (loc, TREE_OPERAND (array, 2), idx,
- complain),
- complain);
+ tree op0, op1, op2;
+ op0 = TREE_OPERAND (array, 0);
+ op1 = TREE_OPERAND (array, 1);
+ op2 = TREE_OPERAND (array, 2);
+ if (TREE_SIDE_EFFECTS (idx) || !tree_invariant_p (idx))
+ {
+ /* If idx could possibly have some SAVE_EXPRs, turning
+ (op0 ? op1 : op2)[idx] into
+ op0 ? op1[idx] : op2[idx] can lead into temporaries
+ initialized in one conditional path and uninitialized
+ uses of them in the other path.
+ And if idx is a really large expression, evaluating it
+ twice is also not optimal.
+ On the other side, op0 must be sequenced before evaluation
+ of op1 and op2 and for C++17 op0, op1 and op2 must be
+ sequenced before idx.
+ If idx is INTEGER_CST, we can just do the optimization
+ without any SAVE_EXPRs, if op1 and op2 are both ARRAY_TYPE
+ VAR_DECLs or COMPONENT_REFs thereof (so their address
+ is constant or relative to frame), optimize into
+ (SAVE_EXPR <op0>, SAVE_EXPR <idx>, SAVE_EXPR <op0>)
+ ? op1[SAVE_EXPR <idx>] : op2[SAVE_EXPR <idx>]
+ Otherwise avoid this optimization. */
+ if (flag_strong_eval_order == 2)
+ {
+ if (TREE_CODE (TREE_TYPE (array)) == ARRAY_TYPE)
+ {
+ tree xop1 = op1;
+ tree xop2 = op2;
+ while (xop1 && handled_component_p (xop1))
+ {
+ switch (TREE_CODE (xop1))
+ {
+ case ARRAY_REF:
+ case ARRAY_RANGE_REF:
+ if (!tree_invariant_p (TREE_OPERAND (xop1, 1))
+ || TREE_OPERAND (xop1, 2) != NULL_TREE
+ || TREE_OPERAND (xop1, 3) != NULL_TREE)
+ {
+ xop1 = NULL_TREE;
+ continue;
+ }
+ break;
+
+ case COMPONENT_REF:
+ if (TREE_OPERAND (xop1, 2) != NULL_TREE)
+ {
+ xop1 = NULL_TREE;
+ continue;
+ }
+ break;
+
+ default:
+ break;
+ }
+ xop1 = TREE_OPERAND (xop1, 0);
+ }
+ if (xop1)
+ STRIP_ANY_LOCATION_WRAPPER (xop1);
+ while (xop2 && handled_component_p (xop2))
+ {
+ switch (TREE_CODE (xop2))
+ {
+ case ARRAY_REF:
+ case ARRAY_RANGE_REF:
+ if (!tree_invariant_p (TREE_OPERAND (xop2, 1))
+ || TREE_OPERAND (xop2, 2) != NULL_TREE
+ || TREE_OPERAND (xop2, 3) != NULL_TREE)
+ {
+ xop2 = NULL_TREE;
+ continue;
+ }
+ break;
+
+ case COMPONENT_REF:
+ if (TREE_OPERAND (xop2, 2) != NULL_TREE)
+ {
+ xop2 = NULL_TREE;
+ continue;
+ }
+ break;
+
+ default:
+ break;
+ }
+ xop2 = TREE_OPERAND (xop2, 0);
+ }
+ if (xop2)
+ STRIP_ANY_LOCATION_WRAPPER (xop2);
+
+ if (!xop1
+ || !xop2
+ || !(CONSTANT_CLASS_P (xop1)
+ || decl_address_invariant_p (xop1))
+ || !(CONSTANT_CLASS_P (xop2)
+ || decl_address_invariant_p (xop2)))
+ {
+ /* Force default conversion on array if
+ we can't optimize this and array is ARRAY_TYPE
+ COND_EXPR, we can't leave COND_EXPRs with
+ ARRAY_TYPE in the IL. */
+ array = cp_default_conversion (array, complain);
+ if (error_operand_p (array))
+ return error_mark_node;
+ break;
+ }
+ }
+ else if (!POINTER_TYPE_P (TREE_TYPE (array))
+ || !tree_invariant_p (op1)
+ || !tree_invariant_p (op2))
+ break;
+ }
+ if (TREE_SIDE_EFFECTS (idx))
+ {
+ idx = save_expr (idx);
+ op0 = save_expr (op0);
+ tree tem = build_compound_expr (loc, op0, idx);
+ op0 = build_compound_expr (loc, tem, op0);
+ }
+ }
+ op1 = cp_build_array_ref (loc, op1, idx, complain);
+ op2 = cp_build_array_ref (loc, op2, idx, complain);
+ ret = build_conditional_expr (loc, op0, op1, op2, complain);
protected_set_expr_location (ret, loc);
return ret;
--- a/src/gcc/cselib.cc
+++ b/src/gcc/cselib.cc
@@ -33,6 +33,7 @@ along with GCC; see the file COPYING3. If not see
#include "cselib.h"
#include "function-abi.h"
#include "alias.h"
+#include "predict.h"
/* A list of cselib_val structures. */
struct elt_list
@@ -248,8 +249,9 @@ static unsigned int *used_regs;
static unsigned int n_used_regs;
/* We pass this to cselib_invalidate_mem to invalidate all of
- memory for a non-const call instruction. */
-static GTY(()) rtx callmem;
+ memory for a non-const call instruction and memory below stack pointer
+ for const/pure calls. */
+static GTY(()) rtx callmem[2];
/* Set by discard_useless_locs if it deleted the last location of any
value. */
@@ -808,7 +810,7 @@ cselib_preserve_only_values (void)
for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
cselib_invalidate_regno (i, reg_raw_mode[i]);
- cselib_invalidate_mem (callmem);
+ cselib_invalidate_mem (callmem[0]);
remove_useless_values ();
@@ -2600,6 +2602,8 @@ cselib_invalidate_mem (rtx mem_rtx)
struct elt_loc_list **p = &v->locs;
bool had_locs = v->locs != NULL;
rtx_insn *setting_insn = v->locs ? v->locs->setting_insn : NULL;
+ rtx sp_base = NULL_RTX;
+ HOST_WIDE_INT sp_off = 0;
while (*p)
{
@@ -2614,6 +2618,114 @@ cselib_invalidate_mem (rtx mem_rtx)
p = &(*p)->next;
continue;
}
+
+ /* When invalidating memory below the stack pointer for const/pure
+ calls and alloca/VLAs aren't used, attempt to optimize. Values
+ stored into area sometimes below the stack pointer shouldn't be
+ addressable and should be stored just through stack pointer
+ derived expressions, so don't invalidate MEMs not using stack
+ derived addresses, or if the MEMs clearly aren't below the stack
+ pointer. This isn't a fully conservative approach, the hope is
+ that invalidating more MEMs than this isn't actually needed. */
+ if (mem_rtx == callmem[1]
+ && num_mems < param_max_cselib_memory_locations
+ && GET_CODE (XEXP (x, 0)) == VALUE
+ && !cfun->calls_alloca)
+ {
+ cselib_val *v2 = CSELIB_VAL_PTR (XEXP (x, 0));
+ rtx x_base = NULL_RTX;
+ HOST_WIDE_INT x_off = 0;
+ if (SP_DERIVED_VALUE_P (v2->val_rtx))
+ x_base = v2->val_rtx;
+ else
+ for (struct elt_loc_list *l = v2->locs; l; l = l->next)
+ if (GET_CODE (l->loc) == PLUS
+ && GET_CODE (XEXP (l->loc, 0)) == VALUE
+ && SP_DERIVED_VALUE_P (XEXP (l->loc, 0))
+ && CONST_INT_P (XEXP (l->loc, 1)))
+ {
+ x_base = XEXP (l->loc, 0);
+ x_off = INTVAL (XEXP (l->loc, 1));
+ break;
+ }
+ /* If x_base is NULL here, don't invalidate x as its address
+ isn't derived from sp such that it could be in outgoing
+ argument area of some call in !ACCUMULATE_OUTGOING_ARGS
+ function. */
+ if (x_base)
+ {
+ if (sp_base == NULL_RTX)
+ {
+ if (cselib_val *v3
+ = cselib_lookup_1 (stack_pointer_rtx, Pmode, 0,
+ VOIDmode))
+ {
+ if (SP_DERIVED_VALUE_P (v3->val_rtx))
+ sp_base = v3->val_rtx;
+ else
+ for (struct elt_loc_list *l = v3->locs;
+ l; l = l->next)
+ if (GET_CODE (l->loc) == PLUS
+ && GET_CODE (XEXP (l->loc, 0)) == VALUE
+ && SP_DERIVED_VALUE_P (XEXP (l->loc, 0))
+ && CONST_INT_P (XEXP (l->loc, 1)))
+ {
+ sp_base = XEXP (l->loc, 0);
+ sp_off = INTVAL (XEXP (l->loc, 1));
+ break;
+ }
+ }
+ if (sp_base == NULL_RTX)
+ sp_base = pc_rtx;
+ }
+ /* Otherwise, if x_base and sp_base are the same,
+ we know that x_base + x_off is the x's address and
+ sp_base + sp_off is current value of stack pointer,
+ so try to determine if x is certainly not below stack
+ pointer. */
+ if (sp_base == x_base)
+ {
+ if (STACK_GROWS_DOWNWARD)
+ {
+ HOST_WIDE_INT off = sp_off;
+#ifdef STACK_ADDRESS_OFFSET
+ /* On SPARC take stack pointer bias into account as
+ well. */
+ off += (STACK_ADDRESS_OFFSET
+ - FIRST_PARM_OFFSET (current_function_decl));
+#endif
+ if (x_off >= off)
+ /* x is at or above the current stack pointer,
+ no need to invalidate it. */
+ x_base = NULL_RTX;
+ }
+ else
+ {
+ HOST_WIDE_INT sz;
+ enum machine_mode mode = GET_MODE (x);
+ if ((MEM_SIZE_KNOWN_P (x)
+ && MEM_SIZE (x).is_constant (&sz))
+ || (mode != BLKmode
+ && GET_MODE_SIZE (mode).is_constant (&sz)))
+ if (x_off < sp_off
+ && ((HOST_WIDE_INT) ((unsigned HOST_WIDE_INT)
+ x_off + sz) <= sp_off))
+ /* x's end is below or at the current stack
+ pointer in !STACK_GROWS_DOWNWARD target,
+ no need to invalidate it. */
+ x_base = NULL_RTX;
+ }
+ }
+ }
+ if (x_base == NULL_RTX)
+ {
+ has_mem = true;
+ num_mems++;
+ p = &(*p)->next;
+ continue;
+ }
+ }
+
if (num_mems < param_max_cselib_memory_locations
&& ! canon_anti_dependence (x, false, mem_rtx,
GET_MODE (mem_rtx), mem_addr))
@@ -3166,14 +3278,24 @@ cselib_process_insn (rtx_insn *insn)
as if they were regular functions. */
if (RTL_LOOPING_CONST_OR_PURE_CALL_P (insn)
|| !(RTL_CONST_OR_PURE_CALL_P (insn)))
- cselib_invalidate_mem (callmem);
+ cselib_invalidate_mem (callmem[0]);
else
- /* For const/pure calls, invalidate any argument slots because
- they are owned by the callee. */
- for (x = CALL_INSN_FUNCTION_USAGE (insn); x; x = XEXP (x, 1))
- if (GET_CODE (XEXP (x, 0)) == USE
- && MEM_P (XEXP (XEXP (x, 0), 0)))
- cselib_invalidate_mem (XEXP (XEXP (x, 0), 0));
+ {
+ /* For const/pure calls, invalidate any argument slots because
+ they are owned by the callee. */
+ for (x = CALL_INSN_FUNCTION_USAGE (insn); x; x = XEXP (x, 1))
+ if (GET_CODE (XEXP (x, 0)) == USE
+ && MEM_P (XEXP (XEXP (x, 0), 0)))
+ cselib_invalidate_mem (XEXP (XEXP (x, 0), 0));
+ /* And invalidate memory below the stack (or above for
+ !STACK_GROWS_DOWNWARD), as even const/pure call can invalidate
+ that. Do this only if !ACCUMULATE_OUTGOING_ARGS or if
+ cfun->calls_alloca, otherwise the stack pointer shouldn't be
+ changing in the middle of the function and nothing should be
+ stored below the stack pointer. */
+ if (!ACCUMULATE_OUTGOING_ARGS || cfun->calls_alloca)
+ cselib_invalidate_mem (callmem[1]);
+ }
}
cselib_record_sets (insn);
@@ -3226,8 +3348,31 @@ cselib_init (int record_what)
/* (mem:BLK (scratch)) is a special mechanism to conflict with everything,
see canon_true_dependence. This is only created once. */
- if (! callmem)
- callmem = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (VOIDmode));
+ if (! callmem[0])
+ callmem[0] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (VOIDmode));
+ /* Similarly create a MEM representing roughly everything below
+ the stack for STACK_GROWS_DOWNWARD targets or everything above
+ it otherwise. Do this only when !ACCUMULATE_OUTGOING_ARGS or
+ if cfun->calls_alloca, otherwise the stack pointer shouldn't be
+ changing in the middle of the function and nothing should be stored
+ below the stack pointer. */
+ if (!callmem[1] && (!ACCUMULATE_OUTGOING_ARGS || cfun->calls_alloca))
+ {
+ if (STACK_GROWS_DOWNWARD)
+ {
+ unsigned HOST_WIDE_INT off = -(GET_MODE_MASK (Pmode) >> 1);
+#ifdef STACK_ADDRESS_OFFSET
+ /* On SPARC take stack pointer bias into account as well. */
+ off += (STACK_ADDRESS_OFFSET
+ - FIRST_PARM_OFFSET (current_function_decl));
+#endif
+ callmem[1] = plus_constant (Pmode, stack_pointer_rtx, off);
+ }
+ else
+ callmem[1] = stack_pointer_rtx;
+ callmem[1] = gen_rtx_MEM (BLKmode, callmem[1]);
+ set_mem_size (callmem[1], GET_MODE_MASK (Pmode) >> 1);
+ }
cselib_nregs = max_reg_num ();
--- a/src/gcc/dfp.cc
+++ b/src/gcc/dfp.cc
@@ -619,11 +619,21 @@ decimal_real_to_integer (const REAL_VALUE_TYPE *r, bool *fail, int precision)
decNumber dn, dn2, dn3;
REAL_VALUE_TYPE to;
char string[256];
+ int scale = 0;
decContextDefault (&set, DEC_INIT_DECIMAL128);
set.traps = 0;
set.round = DEC_ROUND_DOWN;
decimal128ToNumber ((const decimal128 *) r->sig, &dn);
+ if (precision > 64 && decNumberIsFinite (&dn) && dn.exponent > 0)
+ {
+ /* libdecNumber doesn't really handle too large integers.
+ So when precision is large and exponent as well, trim the
+ exponent and adjust the resulting wide_int by multiplying
+ it multiple times with powers of ten. */
+ scale = dn.exponent;
+ dn.exponent = 0;
+ }
decNumberToIntegralValue (&dn2, &dn, &set);
decNumberZero (&dn3);
@@ -633,7 +643,74 @@ decimal_real_to_integer (const REAL_VALUE_TYPE *r, bool *fail, int precision)
function. */
decNumberToString (&dn, string);
real_from_string (&to, string);
- return real_to_integer (&to, fail, precision);
+ bool failp = false;
+ wide_int w = real_to_integer (&to, &failp, precision);
+ if (failp)
+ *fail = true;
+ if (scale && !failp)
+ {
+ bool isneg = wi::neg_p (w);
+ if (isneg)
+ w = -w;
+ enum wi::overflow_type ovf = wi::OVF_NONE;
+ unsigned HOST_WIDE_INT pow10s[] = {
+ HOST_WIDE_INT_UC (10),
+ HOST_WIDE_INT_UC (100),
+ HOST_WIDE_INT_UC (1000),
+ HOST_WIDE_INT_UC (10000),
+ HOST_WIDE_INT_UC (100000),
+ HOST_WIDE_INT_UC (1000000),
+ HOST_WIDE_INT_UC (10000000),
+ HOST_WIDE_INT_UC (100000000),
+ HOST_WIDE_INT_UC (1000000000),
+ HOST_WIDE_INT_UC (10000000000),
+ HOST_WIDE_INT_UC (100000000000),
+ HOST_WIDE_INT_UC (1000000000000),
+ HOST_WIDE_INT_UC (10000000000000),
+ HOST_WIDE_INT_UC (100000000000000),
+ HOST_WIDE_INT_UC (1000000000000000),
+ HOST_WIDE_INT_UC (10000000000000000),
+ HOST_WIDE_INT_UC (100000000000000000),
+ HOST_WIDE_INT_UC (1000000000000000000),
+ HOST_WIDE_INT_UC (10000000000000000000),
+ };
+ int s = scale % 19;
+ if (s)
+ {
+ wide_int wm = wi::uhwi (pow10s[s - 1], w.get_precision ());
+ w = wi::umul (w, wm, &ovf);
+ if (ovf)
+ scale = 0;
+ }
+ scale /= 19;
+ wide_int wm = wi::uhwi (pow10s[18], w.get_precision ());
+ while (scale)
+ {
+ if (scale & 1)
+ {
+ w = wi::umul (w, wm, &ovf);
+ if (ovf)
+ break;
+ }
+ scale >>= 1;
+ if (!scale)
+ break;
+ wm = wi::umul (wm, wm, &ovf);
+ if (ovf)
+ break;
+ }
+ if (ovf)
+ {
+ *fail = true;
+ if (isneg)
+ return wi::set_bit_in_zero (precision - 1, precision);
+ else
+ return ~wi::set_bit_in_zero (precision - 1, precision);
+ }
+ if (isneg)
+ w = -w;
+ }
+ return w;
}
/* Perform the decimal floating point operation described by CODE.
--- a/src/gcc/fortran/ChangeLog
+++ b/src/gcc/fortran/ChangeLog
@@ -1,3 +1,56 @@
+2025-08-22 Harald Anlauf <anlauf@gmx.de>
+
+ Backported from master:
+ 2025-07-18 Harald Anlauf <anlauf@gmx.de>
+
+ PR fortran/121145
+ * trans-expr.cc (gfc_conv_procedure_call): Do not create pointer
+ check for proc-pointer actual passed to optional dummy.
+
+2025-08-22 Harald Anlauf <anlauf@gmx.de>
+
+ Backported from master:
+ 2025-06-27 Harald Anlauf <anlauf@gmx.de>
+
+ PR fortran/120784
+ * interface.cc (gfc_match_end_interface): Detect empty local_name.
+
+2025-08-22 Harald Anlauf <anlauf@gmx.de>
+
+ Backported from master:
+ 2025-06-23 Harald Anlauf <anlauf@gmx.de>
+
+ PR fortran/120784
+ * interface.cc (gfc_match_end_interface): If a use-associated
+ symbol is renamed, use the local_name for checking.
+
+2025-07-16 Paul Thomas <pault@gcc.gnu.org>
+
+ Backported from master:
+ 2025-07-16 Paul Thomas <pault@gcc.gnu.org>
+
+ PR fortran/121060
+ * interface.cc (matching_typebound_op): Defer determination of
+ specific procedure until resolution by returning NULL.
+
+2025-05-25 Harald Anlauf <anlauf@gmx.de>
+
+ Backported from master:
+ 2025-05-15 Harald Anlauf <anlauf@gmx.de>
+
+ PR fortran/85750
+ * resolve.cc (resolve_symbol): Reorder conditions when to apply
+ default-initializers.
+
+2025-05-25 Harald Anlauf <anlauf@gmx.de>
+
+ Backported from master:
+ 2024-08-30 Harald Anlauf <anlauf@gmx.de>
+
+ PR fortran/98454
+ * resolve.cc (resolve_symbol): Add default-initialization of
+ non-allocatable, non-pointer derived-type function results.
+
2025-05-23 Release Manager
* GCC 14.3.0 released.
--- a/src/gcc/fortran/interface.cc
+++ b/src/gcc/fortran/interface.cc
@@ -452,11 +452,20 @@ gfc_match_end_interface (void)
case INTERFACE_DTIO:
case INTERFACE_GENERIC:
+ /* If a use-associated symbol is renamed, check the local_name. */
+ const char *local_name = current_interface.sym->name;
+
+ if (current_interface.sym->attr.use_assoc
+ && current_interface.sym->attr.use_rename
+ && current_interface.sym->ns->use_stmts->rename
+ && (current_interface.sym->ns->use_stmts->rename->local_name[0]
+ != '\0'))
+ local_name = current_interface.sym->ns->use_stmts->rename->local_name;
+
if (type != current_interface.type
- || strcmp (current_interface.sym->name, name) != 0)
+ || strcmp (local_name, name) != 0)
{
- gfc_error ("Expecting %<END INTERFACE %s%> at %C",
- current_interface.sym->name);
+ gfc_error ("Expecting %<END INTERFACE %s%> at %C", local_name);
m = MATCH_ERROR;
}
@@ -4622,6 +4631,13 @@ matching_typebound_op (gfc_expr** tb_base,
gfc_actual_arglist* argcopy;
bool matches;
+ /* If expression matching comes here during parsing, eg. when
+ parsing ASSOCIATE, generic TBPs have not yet been resolved
+ and g->specific will not have been set. Wait for expression
+ resolution by returning NULL. */
+ if (!g->specific && !gfc_current_ns->resolved)
+ return NULL;
+
gcc_assert (g->specific);
if (g->specific->error)
continue;
--- a/src/gcc/fortran/resolve.cc
+++ b/src/gcc/fortran/resolve.cc
@@ -17134,6 +17134,10 @@ skip_interfaces:
|| (a->dummy && !a->pointer && a->intent == INTENT_OUT
&& sym->ns->proc_name->attr.if_source != IFSRC_IFBODY))
apply_default_init (sym);
+ else if (a->function && !a->pointer && !a->allocatable && !a->use_assoc
+ && sym->result)
+ /* Default initialization for function results. */
+ apply_default_init (sym->result);
else if (a->function && sym->result && a->access != ACCESS_PRIVATE
&& (sym->ts.u.derived->attr.alloc_comp
|| sym->ts.u.derived->attr.pointer_comp))
--- a/src/gcc/fortran/trans-expr.cc
+++ b/src/gcc/fortran/trans-expr.cc
@@ -7717,7 +7717,8 @@ gfc_conv_procedure_call (gfc_se * se, gfc_symbol * sym,
msg = xasprintf ("Pointer actual argument '%s' is not "
"associated", e->symtree->n.sym->name);
else if (attr.proc_pointer && !e->value.function.actual
- && (fsym == NULL || !fsym_attr.proc_pointer))
+ && (fsym == NULL
+ || (!fsym_attr.proc_pointer && !fsym_attr.optional)))
msg = xasprintf ("Proc-pointer actual argument '%s' is not "
"associated", e->symtree->n.sym->name);
else
--- a/src/gcc/fwprop.cc
+++ b/src/gcc/fwprop.cc
@@ -842,6 +842,20 @@ forward_propagate_into (use_info *use, bool reg_prop_only = false)
if (def_insn->is_artificial ())
return false;
+ /* Do not propagate asms. The only kind of propagation that would
+ succeed is propagation into a register move. Such a propagation
+ is neutral if the destination of the move is a pseudo and unnecessarily
+ restricts the register allocator if the destination of the move is
+ a hard register.
+
+ Furthermore, unlike for a normal instruction, we cannot take a SET from an
+ asm and try dropping the CLOBBERs. The recog process does not (and should
+ not try to) second-guess whether what the user wrote can be changed and
+ so it has to assume that any asm given to it is a fair reflection of
+ what the user wrote. */
+ if (def_insn->is_asm ())
+ return false;
+
rtx_insn *def_rtl = def_insn->rtl ();
if (!NONJUMP_INSN_P (def_rtl))
return false;
--- a/src/gcc/gimple-fold.cc
+++ b/src/gcc/gimple-fold.cc
@@ -936,6 +936,8 @@ gimple_fold_builtin_memory_op (gimple_stmt_iterator *gsi,
}
goto done;
}
+ else if (!gimple_vdef (stmt) && gimple_in_ssa_p (cfun))
+ return false;
else
{
/* We cannot (easily) change the type of the copy if it is a storage
@@ -1377,6 +1379,8 @@ gimple_fold_builtin_bcmp (gimple_stmt_iterator *gsi)
/* Transform bcmp (a, b, len) into memcmp (a, b, len). */
gimple *stmt = gsi_stmt (*gsi);
+ if (!gimple_vuse (stmt) && gimple_in_ssa_p (cfun))
+ return false;
tree a = gimple_call_arg (stmt, 0);
tree b = gimple_call_arg (stmt, 1);
tree len = gimple_call_arg (stmt, 2);
@@ -1403,6 +1407,8 @@ gimple_fold_builtin_bcopy (gimple_stmt_iterator *gsi)
len) into memmove (dest, src, len). */
gimple *stmt = gsi_stmt (*gsi);
+ if (!gimple_vdef (stmt) && gimple_in_ssa_p (cfun))
+ return false;
tree src = gimple_call_arg (stmt, 0);
tree dest = gimple_call_arg (stmt, 1);
tree len = gimple_call_arg (stmt, 2);
@@ -1428,6 +1434,8 @@ gimple_fold_builtin_bzero (gimple_stmt_iterator *gsi)
/* Transform bzero (dest, len) into memset (dest, 0, len). */
gimple *stmt = gsi_stmt (*gsi);
+ if (!gimple_vdef (stmt) && gimple_in_ssa_p (cfun))
+ return false;
tree dest = gimple_call_arg (stmt, 0);
tree len = gimple_call_arg (stmt, 1);
@@ -1457,6 +1465,9 @@ gimple_fold_builtin_memset (gimple_stmt_iterator *gsi, tree c, tree len)
return true;
}
+ if (!gimple_vdef (stmt) && gimple_in_ssa_p (cfun))
+ return false;
+
if (! tree_fits_uhwi_p (len))
return false;
@@ -1479,20 +1490,20 @@ gimple_fold_builtin_memset (gimple_stmt_iterator *gsi, tree c, tree len)
if ((!INTEGRAL_TYPE_P (etype)
&& !POINTER_TYPE_P (etype))
|| TREE_CODE (etype) == BITINT_TYPE)
- return NULL_TREE;
+ return false;
if (! var_decl_component_p (var))
- return NULL_TREE;
+ return false;
length = tree_to_uhwi (len);
if (GET_MODE_SIZE (SCALAR_INT_TYPE_MODE (etype)) != length
|| (GET_MODE_PRECISION (SCALAR_INT_TYPE_MODE (etype))
!= GET_MODE_BITSIZE (SCALAR_INT_TYPE_MODE (etype)))
|| get_pointer_alignment (dest) / BITS_PER_UNIT < length)
- return NULL_TREE;
+ return false;
if (length > HOST_BITS_PER_WIDE_INT / BITS_PER_UNIT)
- return NULL_TREE;
+ return false;
if (!type_has_mode_precision_p (etype))
etype = lang_hooks.types.type_for_mode (SCALAR_INT_TYPE_MODE (etype),
@@ -2106,7 +2117,7 @@ gimple_fold_builtin_strcpy (gimple_stmt_iterator *gsi,
return false;
}
- if (!len)
+ if (!len || (!gimple_vdef (stmt) && gimple_in_ssa_p (cfun)))
return false;
len = fold_convert_loc (loc, size_type_node, len);
@@ -2181,7 +2192,7 @@ gimple_fold_builtin_strncpy (gimple_stmt_iterator *gsi,
/* OK transform into builtin memcpy. */
tree fn = builtin_decl_implicit (BUILT_IN_MEMCPY);
- if (!fn)
+ if (!fn || (!gimple_vdef (stmt) && gimple_in_ssa_p (cfun)))
return false;
len = fold_convert_loc (loc, size_type_node, len);
@@ -2235,7 +2246,7 @@ gimple_fold_builtin_strchr (gimple_stmt_iterator *gsi, bool is_strrchr)
return true;
}
- if (!integer_zerop (c))
+ if (!integer_zerop (c) || (!gimple_vuse (stmt) && gimple_in_ssa_p (cfun)))
return false;
/* Transform strrchr (s, 0) to strchr (s, 0) when optimizing for size. */
@@ -2333,6 +2344,9 @@ gimple_fold_builtin_strstr (gimple_stmt_iterator *gsi)
return true;
}
+ if (!gimple_vuse (stmt) && gimple_in_ssa_p (cfun))
+ return false;
+
/* Transform strstr (x, "c") into strchr (x, 'c'). */
if (q[1] == '\0')
{
@@ -2385,6 +2399,9 @@ gimple_fold_builtin_strcat (gimple_stmt_iterator *gsi, tree dst, tree src)
if (!optimize_bb_for_speed_p (gimple_bb (stmt)))
return false;
+ if (!gimple_vdef (stmt) && gimple_in_ssa_p (cfun))
+ return false;
+
/* See if we can store by pieces into (dst + strlen(dst)). */
tree newdst;
tree strlen_fn = builtin_decl_implicit (BUILT_IN_STRLEN);
@@ -2454,7 +2471,6 @@ gimple_fold_builtin_strcat_chk (gimple_stmt_iterator *gsi)
tree fn;
const char *p;
-
p = c_getstr (src);
/* If the SRC parameter is "", return DEST. */
if (p && *p == '\0')
@@ -2466,6 +2482,9 @@ gimple_fold_builtin_strcat_chk (gimple_stmt_iterator *gsi)
if (! tree_fits_uhwi_p (size) || ! integer_all_onesp (size))
return false;
+ if (!gimple_vdef (stmt) && gimple_in_ssa_p (cfun))
+ return false;
+
/* If __builtin_strcat_chk is used, assume strcat is available. */
fn = builtin_decl_explicit (BUILT_IN_STRCAT);
if (!fn)
@@ -2556,7 +2575,7 @@ gimple_fold_builtin_strncat (gimple_stmt_iterator *gsi)
/* If the replacement _DECL isn't initialized, don't do the
transformation. */
- if (!fn)
+ if (!fn || (!gimple_vdef (stmt) && gimple_in_ssa_p (cfun)))
return false;
/* Otherwise, emit a call to strcat. */
@@ -2588,6 +2607,9 @@ gimple_fold_builtin_strncat_chk (gimple_stmt_iterator *gsi)
return true;
}
+ if (!gimple_vdef (stmt) && gimple_in_ssa_p (cfun))
+ return false;
+
if (! integer_all_onesp (size))
{
tree src_len = c_strlen (src, 1);
@@ -2678,6 +2700,9 @@ gimple_fold_builtin_string_compare (gimple_stmt_iterator *gsi)
return true;
}
+ if (!gimple_vuse (stmt) && gimple_in_ssa_p (cfun))
+ return false;
+
/* Initially set to the number of characters, including the terminating
nul if each array has one. LENx == strnlen (Sx, LENx) implies that
the array Sx is not terminated by a nul.
@@ -2970,7 +2995,7 @@ gimple_fold_builtin_fputs (gimple_stmt_iterator *gsi,
const char *p = c_getstr (arg0);
if (p != NULL)
{
- if (!fn_fputc)
+ if (!fn_fputc || (!gimple_vdef (stmt) && gimple_in_ssa_p (cfun)))
return false;
gimple *repl
@@ -2989,7 +3014,7 @@ gimple_fold_builtin_fputs (gimple_stmt_iterator *gsi,
return false;
/* New argument list transforming fputs(string, stream) to
fwrite(string, 1, len, stream). */
- if (!fn_fwrite)
+ if (!fn_fwrite || (!gimple_vdef (stmt) && gimple_in_ssa_p (cfun)))
return false;
gimple *repl
@@ -3040,6 +3065,9 @@ gimple_fold_builtin_memory_chk (gimple_stmt_iterator *gsi,
}
}
+ if (!gimple_vdef (stmt) && gimple_in_ssa_p (cfun))
+ return false;
+
tree maxlen = get_maxval_strlen (len, SRK_INT_VALUE);
if (! integer_all_onesp (size)
&& !known_lower (stmt, len, size)
@@ -3138,6 +3166,9 @@ gimple_fold_builtin_stxcpy_chk (gimple_stmt_iterator *gsi,
return true;
}
+ if (!gimple_vdef (stmt) && gimple_in_ssa_p (cfun))
+ return false;
+
tree maxlen = get_maxval_strlen (src, SRK_STRLENMAX);
if (! integer_all_onesp (size))
{
@@ -3231,7 +3262,7 @@ gimple_fold_builtin_stxncpy_chk (gimple_stmt_iterator *gsi,
/* If __builtin_st{r,p}ncpy_chk is used, assume st{r,p}ncpy is available. */
fn = builtin_decl_explicit (fcode == BUILT_IN_STPNCPY_CHK && !ignore
? BUILT_IN_STPNCPY : BUILT_IN_STRNCPY);
- if (!fn)
+ if (!fn || (!gimple_vdef (stmt) && gimple_in_ssa_p (cfun)))
return false;
gcall *repl = gimple_build_call (fn, 3, dest, src, len);
@@ -3252,6 +3283,9 @@ gimple_fold_builtin_stpcpy (gimple_stmt_iterator *gsi)
tree src = gimple_call_arg (stmt, 1);
tree fn, lenp1;
+ if (!gimple_vdef (stmt) && gimple_in_ssa_p (cfun))
+ return false;
+
/* If the result is unused, replace stpcpy with strcpy. */
if (gimple_call_lhs (stmt) == NULL_TREE)
{
@@ -3369,7 +3403,7 @@ gimple_fold_builtin_snprintf_chk (gimple_stmt_iterator *gsi,
available. */
fn = builtin_decl_explicit (fcode == BUILT_IN_VSNPRINTF_CHK
? BUILT_IN_VSNPRINTF : BUILT_IN_SNPRINTF);
- if (!fn)
+ if (!fn || (!gimple_vdef (stmt) && gimple_in_ssa_p (cfun)))
return false;
/* Replace the called function and the first 5 argument by 3 retaining
@@ -3456,7 +3490,7 @@ gimple_fold_builtin_sprintf_chk (gimple_stmt_iterator *gsi,
/* If __builtin_{,v}sprintf_chk is used, assume {,v}sprintf is available. */
fn = builtin_decl_explicit (fcode == BUILT_IN_VSPRINTF_CHK
? BUILT_IN_VSPRINTF : BUILT_IN_SPRINTF);
- if (!fn)
+ if (!fn || (!gimple_vdef (stmt) && gimple_in_ssa_p (cfun)))
return false;
/* Replace the called function and the first 4 argument by 2 retaining
@@ -3505,7 +3539,7 @@ gimple_fold_builtin_sprintf (gimple_stmt_iterator *gsi)
return false;
tree fn = builtin_decl_implicit (BUILT_IN_STRCPY);
- if (!fn)
+ if (!fn || (!gimple_vdef (stmt) && gimple_in_ssa_p (cfun)))
return false;
/* If the format doesn't contain % args or %%, use strcpy. */
@@ -3618,7 +3652,8 @@ gimple_fold_builtin_snprintf (gimple_stmt_iterator *gsi)
tree orig = NULL_TREE;
const char *fmt_str = NULL;
- if (gimple_call_num_args (stmt) > 4)
+ if (gimple_call_num_args (stmt) > 4
+ || (!gimple_vdef (stmt) && gimple_in_ssa_p (cfun)))
return false;
if (gimple_call_num_args (stmt) == 4)
@@ -3776,6 +3811,9 @@ gimple_fold_builtin_fprintf (gimple_stmt_iterator *gsi,
if (!init_target_chars ())
return false;
+ if (!gimple_vdef (stmt) && gimple_in_ssa_p (cfun))
+ return false;
+
/* If the format doesn't contain % args or %%, use strcpy. */
if (strchr (fmt_str, target_percent) == NULL)
{
@@ -3855,6 +3893,9 @@ gimple_fold_builtin_printf (gimple_stmt_iterator *gsi, tree fmt,
if (gimple_call_lhs (stmt) != NULL_TREE)
return false;
+ if (!gimple_vdef (stmt) && gimple_in_ssa_p (cfun))
+ return false;
+
/* Check whether the format is a literal string constant. */
fmt_str = c_getstr (fmt);
if (fmt_str == NULL)
@@ -4096,6 +4137,9 @@ gimple_fold_builtin_realloc (gimple_stmt_iterator *gsi)
tree arg = gimple_call_arg (stmt, 0);
tree size = gimple_call_arg (stmt, 1);
+ if (!gimple_vdef (stmt) && gimple_in_ssa_p (cfun))
+ return false;
+
if (operand_equal_p (arg, null_pointer_node, 0))
{
tree fn_malloc = builtin_decl_implicit (BUILT_IN_MALLOC);
@@ -8199,10 +8243,17 @@ fold_nonarray_ctor_reference (tree type, tree ctor,
{
if (BYTES_BIG_ENDIAN != WORDS_BIG_ENDIAN)
return NULL_TREE;
- const unsigned int encoding_size
- = GET_MODE_BITSIZE (SCALAR_INT_TYPE_MODE (TREE_TYPE (cfield)));
if (BYTES_BIG_ENDIAN)
- inner_offset += encoding_size - wi::to_offset (field_size);
+ {
+ tree ctype = TREE_TYPE (cfield);
+ unsigned int encoding_size;
+ if (TYPE_MODE (ctype) != BLKmode)
+ encoding_size
+ = GET_MODE_BITSIZE (SCALAR_INT_TYPE_MODE (ctype));
+ else
+ encoding_size = TREE_INT_CST_LOW (TYPE_SIZE (ctype));
+ inner_offset += encoding_size - wi::to_offset (field_size);
+ }
}
return fold_ctor_reference (type, cval,
@@ -8400,19 +8451,21 @@ fold_const_aggregate_ref_1 (tree t, tree (*valueize) (tree))
base = get_ref_base_and_extent (t, &offset, &size, &max_size, &reverse);
ctor = get_base_constructor (base, &offset, valueize);
+ /* We cannot determine ctor. */
+ if (!ctor)
+ return NULL_TREE;
/* Empty constructor. Always fold to 0. */
if (ctor == error_mark_node)
return build_zero_cst (TREE_TYPE (t));
- /* We do not know precise address. */
+ /* We do not know precise access. */
if (!known_size_p (max_size) || maybe_ne (max_size, size))
return NULL_TREE;
- /* We cannot determine ctor. */
- if (!ctor)
- return NULL_TREE;
-
/* Out of bound array access. Value is undefined, but don't fold. */
if (maybe_lt (offset, 0))
return NULL_TREE;
+ /* Access with reverse storage order. */
+ if (reverse)
+ return NULL_TREE;
tem = fold_ctor_reference (TREE_TYPE (t), ctor, offset, size, base);
if (tem)
@@ -8432,7 +8485,6 @@ fold_const_aggregate_ref_1 (tree t, tree (*valueize) (tree))
&& offset.is_constant (&coffset)
&& (coffset % BITS_PER_UNIT != 0
|| csize % BITS_PER_UNIT != 0)
- && !reverse
&& BYTES_BIG_ENDIAN == WORDS_BIG_ENDIAN)
{
poly_int64 bitoffset;
--- a/src/gcc/gimple-lower-bitint.cc
+++ b/src/gcc/gimple-lower-bitint.cc
@@ -76,7 +76,7 @@ enum bitint_prec_kind {
/* Caches to speed up bitint_precision_kind. */
static int small_max_prec, mid_min_prec, large_min_prec, huge_min_prec;
-static int limb_prec;
+static int limb_prec, abi_limb_prec;
/* Categorize _BitInt(PREC) as small, middle, large or huge. */
@@ -106,6 +106,9 @@ bitint_precision_kind (int prec)
large_min_prec = MAX_FIXED_MODE_SIZE + 1;
if (!limb_prec)
limb_prec = GET_MODE_PRECISION (limb_mode);
+ if (!abi_limb_prec)
+ abi_limb_prec
+ = GET_MODE_PRECISION (as_a <scalar_int_mode> (info.abi_limb_mode));
if (!huge_min_prec)
{
if (4 * limb_prec >= MAX_FIXED_MODE_SIZE)
@@ -2213,7 +2216,7 @@ range_to_prec (tree op, gimple *stmt)
from that precision, if it is negative, the operand is sign-extended
from -*PREC. If PREC_STORED is NULL, it is the toplevel call,
otherwise *PREC_STORED is prec from the innermost call without
- range optimizations. */
+ range optimizations (0 for uninitialized SSA_NAME). */
tree
bitint_large_huge::handle_operand_addr (tree op, gimple *stmt,
@@ -2318,7 +2321,7 @@ bitint_large_huge::handle_operand_addr (tree op, gimple *stmt,
{
*prec = TYPE_UNSIGNED (TREE_TYPE (op)) ? limb_prec : -limb_prec;
if (prec_stored)
- *prec_stored = *prec;
+ *prec_stored = 0;
tree var = create_tmp_var (m_limb_type);
TREE_ADDRESSABLE (var) = 1;
ret = build_fold_addr_expr (var);
@@ -2346,6 +2349,8 @@ bitint_large_huge::handle_operand_addr (tree op, gimple *stmt,
tree rhs_type = TREE_TYPE (rhs1);
int prec_stored_val = 0;
ret = handle_operand_addr (rhs1, g, &prec_stored_val, prec);
+ if (prec_stored)
+ *prec_stored = prec_stored_val;
if (TYPE_PRECISION (lhs_type) > TYPE_PRECISION (rhs_type))
{
if (TYPE_UNSIGNED (lhs_type)
@@ -2354,7 +2359,9 @@ bitint_large_huge::handle_operand_addr (tree op, gimple *stmt,
}
else
{
- if (*prec > 0 && *prec < TYPE_PRECISION (lhs_type))
+ if (prec_stored_val == 0)
+ /* Non-widening cast of uninitialized value. */;
+ else if (*prec > 0 && *prec < TYPE_PRECISION (lhs_type))
;
else if (TYPE_UNSIGNED (lhs_type))
{
@@ -6066,7 +6073,7 @@ static unsigned int
gimple_lower_bitint (void)
{
small_max_prec = mid_min_prec = large_min_prec = huge_min_prec = 0;
- limb_prec = 0;
+ limb_prec = abi_limb_prec = 0;
unsigned int i;
for (i = 0; i < num_ssa_names; ++i)
@@ -7024,7 +7031,20 @@ gimple_lower_bitint (void)
from smaller number. */
min_prec = prec;
else
- min_prec = CEIL (min_prec, limb_prec) * limb_prec;
+ {
+ min_prec = CEIL (min_prec, limb_prec) * limb_prec;
+ if (min_prec > (unsigned) limb_prec
+ && abi_limb_prec > limb_prec)
+ {
+ /* For targets with ABI limb precision higher than
+ limb precision round to ABI limb precision,
+ otherwise c can contain padding bits. */
+ min_prec
+ = CEIL (min_prec, abi_limb_prec) * abi_limb_prec;
+ if (min_prec > prec - rem - 2 * limb_prec)
+ min_prec = prec;
+ }
+ }
if (min_prec == 0)
c = NULL_TREE;
else if (min_prec == prec)
--- a/src/gcc/gimple-ssa-store-merging.cc
+++ b/src/gcc/gimple-ssa-store-merging.cc
@@ -1057,6 +1057,8 @@ find_bswap_or_nop (gimple *stmt, struct symbolic_number *n, bool *bswap,
if (count <= range / BITS_PER_MARKER)
{
count = (count + i) * BITS_PER_MARKER % range;
+ if (!count)
+ return NULL;
break;
}
else
--- a/src/gcc/optabs.cc
+++ b/src/gcc/optabs.cc
@@ -1368,8 +1368,7 @@ avoid_expensive_constant (machine_mode mode, optab binoptab,
static rtx
expand_binop_directly (enum insn_code icode, machine_mode mode, optab binoptab,
rtx op0, rtx op1,
- rtx target, int unsignedp, enum optab_methods methods,
- rtx_insn *last)
+ rtx target, int unsignedp, enum optab_methods methods)
{
machine_mode xmode0 = insn_data[(int) icode].operand[1].mode;
machine_mode xmode1 = insn_data[(int) icode].operand[2].mode;
@@ -1379,6 +1378,7 @@ expand_binop_directly (enum insn_code icode, machine_mode mode, optab binoptab,
rtx_insn *pat;
rtx xop0 = op0, xop1 = op1;
bool canonicalize_op1 = false;
+ rtx_insn *last = get_last_insn ();
/* If it is a commutative operator and the modes would match
if we would swap the operands, we can save the conversions. */
@@ -1443,10 +1443,7 @@ expand_binop_directly (enum insn_code icode, machine_mode mode, optab binoptab,
tmp_mode = insn_data[(int) icode].operand[0].mode;
if (VECTOR_MODE_P (mode)
&& maybe_ne (GET_MODE_NUNITS (tmp_mode), 2 * GET_MODE_NUNITS (mode)))
- {
- delete_insns_since (last);
- return NULL_RTX;
- }
+ return NULL_RTX;
}
else
tmp_mode = mode;
@@ -1466,14 +1463,14 @@ expand_binop_directly (enum insn_code icode, machine_mode mode, optab binoptab,
ops[1].value, ops[2].value, mode0))
{
delete_insns_since (last);
- return expand_binop (mode, binoptab, op0, op1, NULL_RTX,
- unsignedp, methods);
+ return expand_binop_directly (icode, mode, binoptab, op0, op1,
+ NULL_RTX, unsignedp, methods);
}
emit_insn (pat);
return ops[0].value;
}
- delete_insns_since (last);
+
return NULL_RTX;
}
@@ -1542,9 +1539,10 @@ expand_binop (machine_mode mode, optab binoptab, rtx op0, rtx op1,
if (icode != CODE_FOR_nothing)
{
temp = expand_binop_directly (icode, mode, binoptab, op0, op1,
- target, unsignedp, methods, last);
+ target, unsignedp, methods);
if (temp)
return temp;
+ delete_insns_since (last);
}
}
@@ -1570,9 +1568,10 @@ expand_binop (machine_mode mode, optab binoptab, rtx op0, rtx op1,
NULL_RTX, unsignedp, OPTAB_DIRECT);
temp = expand_binop_directly (icode, int_mode, otheroptab, op0, newop1,
- target, unsignedp, methods, last);
+ target, unsignedp, methods);
if (temp)
return temp;
+ delete_insns_since (last);
}
/* If this is a multiply, see if we can do a widening operation that
@@ -1636,9 +1635,10 @@ expand_binop (machine_mode mode, optab binoptab, rtx op0, rtx op1,
if (vop1)
{
temp = expand_binop_directly (icode, mode, otheroptab, op0, vop1,
- target, unsignedp, methods, last);
+ target, unsignedp, methods);
if (temp)
return temp;
+ delete_insns_since (last);
}
}
}
--- a/src/gcc/real.cc
+++ b/src/gcc/real.cc
@@ -101,7 +101,7 @@ static int do_compare (const REAL_VALUE_TYPE *, const REAL_VALUE_TYPE *, int);
static void do_fix_trunc (REAL_VALUE_TYPE *, const REAL_VALUE_TYPE *);
static unsigned long rtd_divmod (REAL_VALUE_TYPE *, REAL_VALUE_TYPE *);
-static void decimal_from_integer (REAL_VALUE_TYPE *);
+static void decimal_from_integer (REAL_VALUE_TYPE *, int);
static void decimal_integer_string (char *, const REAL_VALUE_TYPE *,
size_t);
@@ -2230,7 +2230,6 @@ real_from_integer (REAL_VALUE_TYPE *r, format_helper fmt,
{
unsigned int len = val_in.get_precision ();
int i, j, e = 0;
- int maxbitlen = MAX_BITSIZE_MODE_ANY_INT + HOST_BITS_PER_WIDE_INT;
const unsigned int realmax = (SIGNIFICAND_BITS / HOST_BITS_PER_WIDE_INT
* HOST_BITS_PER_WIDE_INT);
@@ -2238,12 +2237,6 @@ real_from_integer (REAL_VALUE_TYPE *r, format_helper fmt,
r->cl = rvc_normal;
r->sign = wi::neg_p (val_in, sgn);
- /* We have to ensure we can negate the largest negative number. */
- wide_int val = wide_int::from (val_in, maxbitlen, sgn);
-
- if (r->sign)
- val = -val;
-
/* Ensure a multiple of HOST_BITS_PER_WIDE_INT, ceiling, as elt
won't work with precisions that are not a multiple of
HOST_BITS_PER_WIDE_INT. */
@@ -2252,7 +2245,13 @@ real_from_integer (REAL_VALUE_TYPE *r, format_helper fmt,
/* Ensure we can represent the largest negative number. */
len += 1;
- len = len/HOST_BITS_PER_WIDE_INT * HOST_BITS_PER_WIDE_INT;
+ len = len / HOST_BITS_PER_WIDE_INT * HOST_BITS_PER_WIDE_INT;
+
+ /* We have to ensure we can negate the largest negative number. */
+ wide_int val = wide_int::from (val_in, len, sgn);
+
+ if (r->sign)
+ val = -val;
/* Cap the size to the size allowed by real.h. */
if (len > realmax)
@@ -2260,14 +2259,18 @@ real_from_integer (REAL_VALUE_TYPE *r, format_helper fmt,
HOST_WIDE_INT cnt_l_z;
cnt_l_z = wi::clz (val);
- if (maxbitlen - cnt_l_z > realmax)
+ if (len - cnt_l_z > realmax)
{
- e = maxbitlen - cnt_l_z - realmax;
+ e = len - cnt_l_z - realmax;
/* This value is too large, we must shift it right to
preserve all the bits we can, and then bump the
- exponent up by that amount. */
- val = wi::lrshift (val, e);
+ exponent up by that amount, but or in 1 if any of
+ the shifted out bits are non-zero. */
+ if (wide_int::from (val, e, UNSIGNED) != 0)
+ val = wi::set_bit (wi::lrshift (val, e), 0);
+ else
+ val = wi::lrshift (val, e);
}
len = realmax;
}
@@ -2306,7 +2309,9 @@ real_from_integer (REAL_VALUE_TYPE *r, format_helper fmt,
}
if (fmt.decimal_p ())
- decimal_from_integer (r);
+ /* We need at most one decimal digits for each 3 bits of input
+ precision. */
+ decimal_from_integer (r, val_in.get_precision () / 3);
if (fmt)
real_convert (r, fmt, r);
}
@@ -2361,12 +2366,21 @@ decimal_integer_string (char *str, const REAL_VALUE_TYPE *r_orig,
/* Convert a real with an integral value to decimal float. */
static void
-decimal_from_integer (REAL_VALUE_TYPE *r)
+decimal_from_integer (REAL_VALUE_TYPE *r, int digits)
{
char str[256];
- decimal_integer_string (str, r, sizeof (str) - 1);
- decimal_real_from_string (r, str);
+ if (digits <= 256)
+ {
+ decimal_integer_string (str, r, sizeof (str) - 1);
+ decimal_real_from_string (r, str);
+ }
+ else
+ {
+ char *s = XALLOCAVEC (char, digits);
+ decimal_integer_string (s, r, digits - 1);
+ decimal_real_from_string (r, s);
+ }
}
/* Returns 10**2**N. */
--- a/src/gcc/testsuite/ChangeLog
+++ b/src/gcc/testsuite/ChangeLog
@@ -1,3 +1,496 @@
+2025-08-22 Harald Anlauf <anlauf@gmx.de>
+
+ Backported from master:
+ 2025-07-18 Harald Anlauf <anlauf@gmx.de>
+
+ PR fortran/121145
+ * gfortran.dg/pointer_check_15.f90: New test.
+
+2025-08-22 Harald Anlauf <anlauf@gmx.de>
+
+ Backported from master:
+ 2025-06-27 Harald Anlauf <anlauf@gmx.de>
+
+ PR fortran/120784
+ * gfortran.dg/interface_63.f90: Extend testcase.
+
+2025-08-22 Harald Anlauf <anlauf@gmx.de>
+
+ Backported from master:
+ 2025-06-23 Harald Anlauf <anlauf@gmx.de>
+
+ PR fortran/120784
+ * gfortran.dg/interface_63.f90: New test.
+
+2025-08-20 Martin Jambor <mjambor@suse.cz>
+
+ Backported from master:
+ 2025-07-23 Martin Jambor <mjambor@suse.cz>
+
+ PR tree-optimization/119085
+ * gcc.dg/tree-ssa/pr119085.c: New test.
+
+2025-08-20 Martin Jambor <mjambor@suse.cz>
+
+ Backported from master:
+ 2025-07-18 Martin Jambor <mjambor@suse.cz>
+
+ PR tree-optimization/117423
+ * gcc.dg/tree-ssa/pr117423.c: New test.
+
+2025-08-18 Richard Sandiford <richard.sandiford@arm.com>
+
+ Backported from master:
+ 2025-08-18 Richard Sandiford <richard.sandiford@arm.com>
+
+ PR target/121118
+ * gcc.target/aarch64/sve/acle/general/pr121118_1.c: New test.
+
+2025-08-18 Richard Sandiford <richard.sandiford@arm.com>
+
+ Backported from master:
+ 2025-08-12 Richard Sandiford <richard.sandiford@arm.com>
+
+ PR rtl-optimization/121253
+ * gcc.target/aarch64/pr121253.c: New test.
+
+2025-08-15 Pengfei Li <Pengfei.Li2@arm.com>
+
+ PR target/121449
+ * g++.target/aarch64/sve/pr121449.C: New test.
+
+2025-08-15 Richard Sandiford <richard.sandiford@arm.com>
+
+ Backported from master:
+ 2025-07-17 Richard Sandiford <richard.sandiford@arm.com>
+ Yury Khrustalev <yury.khrustalev@arm.com>
+
+ * lib/target-supports.exp (add_options_for_aarch64_sme)
+ (check_effective_target_aarch64_sme_hw): New procedures.
+ * g++.target/aarch64/sme/sme_throw_1.C: New test.
+ * g++.target/aarch64/sme/sme_throw_2.C: Likewise.
+
+2025-08-15 Lulu Cheng <chenglulu@loongson.cn>
+
+ Backported from master:
+ 2025-08-15 Lulu Cheng <chenglulu@loongson.cn>
+
+ PR target/121542
+ * gcc.target/loongarch/pr121542.c: New test.
+
+2025-08-14 Richard Sandiford <richard.sandiford@arm.com>
+
+ Backported from master:
+ 2025-08-14 Richard Sandiford <richard.sandiford@arm.com>
+
+ PR target/121414
+ * gcc.target/aarch64/sme/pr121414_1.c: New test.
+
+2025-08-14 Richard Sandiford <richard.sandiford@arm.com>
+
+ Backported from master:
+ 2025-08-14 Richard Sandiford <richard.sandiford@arm.com>
+
+ PR target/121294
+ * gcc.target/aarch64/sve/acle/general/rev_2.c: New test.
+
+2025-08-14 Richard Sandiford <richard.sandiford@arm.com>
+
+ Backported from master:
+ 2025-08-14 Richard Sandiford <richard.sandiford@arm.com>
+
+ PR target/121294
+ * gcc.target/aarch64/sve/acle/general/perm_2.c: New test.
+ * gcc.target/aarch64/sve/acle/general/perm_3.c: Likewise.
+ * gcc.target/aarch64/sve/acle/general/perm_4.c: Likewise.
+ * gcc.target/aarch64/sve/acle/general/perm_5.c: Likewise.
+ * gcc.target/aarch64/sve/acle/general/perm_6.c: Likewise.
+ * gcc.target/aarch64/sve/acle/general/perm_7.c: Likewise.
+
+2025-08-14 H.J. Lu <hjl.tools@gmail.com>
+
+ Backported from master:
+ 2025-07-29 H.J. Lu <hjl.tools@gmail.com>
+
+ PR target/121208
+ * gcc.target/i386/pr121208-1a.c (dg-options): Add
+ -mno-sse -mno-mmx -mno-80387.
+ * gcc.target/i386/pr121208-1b.c (dg-options): Likewise.
+
+2025-08-14 H.J. Lu <hjl.tools@gmail.com>
+
+ Backported from master:
+ 2025-07-28 H.J. Lu <hjl.tools@gmail.com>
+
+ PR target/121208
+ * gcc.target/i386/pr121208-1a.c: New test.
+ * gcc.target/i386/pr121208-1b.c: Likewise.
+ * gcc.target/i386/pr121208-2a.c: Likewise.
+ * gcc.target/i386/pr121208-2b.c: Likewise.
+ * gcc.target/i386/pr121208-3a.c: Likewise.
+ * gcc.target/i386/pr121208-3b.c: Likewise.
+
+2025-08-11 Alexandre Oliva <oliva@adacore.com>
+
+ Backported from master:
+ 2025-05-21 Alexandre Oliva <oliva@adacore.com>
+
+ * gcc.dg/vect/tsvc/vect-tsvc-s332.c: Require vect_early_break_hw.
+ * gcc.dg/vect/tsvc/vect-tsvc-s481.c: Likewise.
+ * gcc.dg/vect/tsvc/vect-tsvc-s482.c: Likewise.
+
+2025-08-10 Torbjörn SVENSSON <torbjorn.svensson@foss.st.com>
+
+ Backported from master:
+ 2025-08-10 Torbjörn SVENSSON <torbjorn.svensson@foss.st.com>
+
+ * lib/multiline.exp: Added pruning of .exe.
+
+2025-08-08 Patrick Palka <ppalka@redhat.com>
+
+ Backported from master:
+ 2025-08-04 Patrick Palka <ppalka@redhat.com>
+
+ PR c++/120620
+ * g++.dg/cpp2a/constexpr-dynamic19.C: New test.
+ * g++.dg/cpp2a/constexpr-dynamic1a.C: New test.
+
+2025-08-08 Jakub Jelinek <jakub@redhat.com>
+
+ Backported from master:
+ 2025-08-06 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/121413
+ * gcc.dg/torture/bitint-85.c: New test.
+
+2025-08-08 Jakub Jelinek <jakub@redhat.com>
+
+ Backported from master:
+ 2025-08-06 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/121127
+ * gcc.dg/bitint-125.c: New test.
+
+2025-08-08 Jakub Jelinek <jakub@redhat.com>
+
+ Backported from master:
+ 2025-08-01 Jakub Jelinek <jakub@redhat.com>
+
+ PR middle-end/121322
+ * gcc.dg/pr121322.c: New test.
+
+2025-08-08 Jakub Jelinek <jakub@redhat.com>
+
+ Backported from master:
+ 2025-07-11 Jakub Jelinek <jakub@redhat.com>
+
+ PR c++/120954
+ * c-c++-common/Warray-bounds-11.c: New test.
+
+2025-08-08 Jakub Jelinek <jakub@redhat.com>
+
+ Backported from master:
+ 2025-07-04 Jakub Jelinek <jakub@redhat.com>
+
+ PR c/120837
+ * gcc.dg/ubsan/pr120837.c: New test.
+
+2025-08-08 Jakub Jelinek <jakub@redhat.com>
+
+ Backported from master:
+ 2025-07-01 Jakub Jelinek <jakub@redhat.com>
+
+ PR testsuite/120919
+ * gcc.target/powerpc/builtin_altivec_tr_stxvr_runnable.c (main): Change
+ sc, ss, si and sll vars from scalars to arrays of 2 elements,
+ initialize and test just the first one though.
+
+2025-08-01 Jason Merrill <jason@redhat.com>
+
+ Backported from master:
+ 2025-07-31 Jason Merrill <jason@redhat.com>
+
+ PR c++/120800
+ * g++.dg/cpp0x/constexpr-array30.C: New test.
+
+2025-07-31 Spencer Abson <spencer.abson@arm.com>
+
+ Backported from master:
+ 2025-07-31 Spencer Abson <spencer.abson@arm.com>
+
+ PR target/121028
+ * gcc.target/aarch64/sme/call_sm_switch_1.c: Tell check-function
+ -bodies not to ignore .inst directives, and replace the test for
+ "smstart sm" with one for it's encoding.
+ * gcc.target/aarch64/sme/call_sm_switch_11.c: Likewise.
+ * gcc.target/aarch64/sme/pr121028.c: New test.
+
+2025-07-31 Jeevitha <jeevitha@linux.ibm.com>
+
+ Backported from master:
+ 2025-07-24 Jeevitha Palanisamy <jeevitha@linux.ibm.com>
+
+ PR testsuite/119382
+ * gcc.target/powerpc/vsx-builtin-7.c: Add '-fno-ipa-icf' to dg-options.
+
+2025-07-31 H.J. Lu <hjl.tools@gmail.com>
+
+ Backported from master:
+ 2025-07-30 H.J. Lu <hjl.tools@gmail.com>
+
+ PR target/120427
+ * gcc.target/i386/pr120427-5.c: New test.
+
+2025-07-31 liuhongt <hongtao.liu@intel.com>
+
+ Backported from master:
+ 2025-07-30 liuhongt <hongtao.liu@intel.com>
+
+ * gcc.target/i386/pr121274.c: New test.
+
+2025-07-29 H.J. Lu <hjl.tools@gmail.com>
+
+ Backported from master:
+ 2025-06-19 H.J. Lu <hjl.tools@gmail.com>
+
+ PR target/120427
+ * gcc.target/i386/cold-attribute-4.c: Compile with -Oz.
+ * gcc.target/i386/pr120427-1.c: New test.
+ * gcc.target/i386/pr120427-2.c: Likewise.
+ * gcc.target/i386/pr120427-3.c: Likewise.
+ * gcc.target/i386/pr120427-4.c: Likewise.
+
+2025-07-28 Xi Ruoyao <xry111@xry111.site>
+
+ Backported from master:
+ 2025-07-17 Xi Ruoyao <xry111@xry111.site>
+
+ PR target/121064
+ * gcc.target/loongarch/pr121064.c: New test.
+
+2025-07-26 Richard Sandiford <richard.sandiford@arm.com>
+
+ Backported from master:
+ 2025-07-11 Richard Sandiford <richard.sandiford@arm.com>
+
+ PR target/121027
+ * gcc.target/aarch64/sve/acle/general/perm_1.c: New test.
+
+2025-07-26 Richard Sandiford <richard.sandiford@arm.com>
+
+ Backported from master:
+ 2024-10-07 Richard Sandiford <richard.sandiford@arm.com>
+
+ PR target/121027
+ * gcc.target/aarch64/sve/permute_5.c: New test.
+
+2025-07-26 Jason Merrill <jason@redhat.com>
+
+ Backported from master:
+ 2025-07-15 Jason Merrill <jason@redhat.com>
+
+ PR c++/120577
+ * g++.dg/cpp2a/constexpr-union9.C: New test.
+
+2025-07-22 Haochen Gui <guihaoc@gcc.gnu.org>
+
+ Backported from master:
+ 2024-08-15 Haochen Gui <guihaoc@gcc.gnu.org>
+
+ * gcc.target/powerpc/float128-cmp2-runnable.c: Replace
+ ppc_float128_sw with ppc_float128_hw and remove p9vector_hw.
+
+2025-07-18 Jakub Jelinek <jakub@redhat.com>
+
+ Backported from master:
+ 2025-07-18 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/121131
+ * gcc.dg/bitint-124.c: New test.
+
+2025-07-17 H.J. Lu <hjl.tools@gmail.com>
+
+ Backported from master:
+ 2025-07-03 H.J. Lu <hjl.tools@gmail.com>
+
+ PR target/120908
+ * gcc.target/i386/pr120908.c: New test.
+
+2025-07-17 Jason Merrill <jason@redhat.com>
+
+ PR c++/87097
+ * g++.dg/cpp0x/constexpr-array29.C: New test.
+
+2025-07-16 Paul Thomas <pault@gcc.gnu.org>
+
+ Backported from master:
+ 2025-07-16 Paul Thomas <pault@gcc.gnu.org>
+
+ PR fortran/121060
+ * gfortran.dg/associate_75.f90: New test.
+
+2025-07-03 Jakub Jelinek <jakub@redhat.com>
+
+ Backported from master:
+ 2025-07-03 Jakub Jelinek <jakub@redhat.com>
+
+ PR c++/120940
+ * g++.dg/parse/pr120940.C: New test.
+ * g++.dg/warn/Wduplicated-branches9.C: New test.
+
+2025-07-03 Jakub Jelinek <jakub@redhat.com>
+
+ Backported from master:
+ 2025-07-01 Jakub Jelinek <jakub@redhat.com>
+
+ PR c++/120471
+ * g++.dg/ubsan/pr120471.C: New test.
+ * g++.dg/parse/pr120471.C: New test.
+
+2025-07-03 Richard Sandiford <richard.sandiford@arm.com>
+
+ Backported from master:
+ 2025-06-12 Richard Sandiford <richard.sandiford@arm.com>
+
+ PR target/120624
+ * gcc.target/aarch64/sme/za_state_7.c: New test.
+
+2025-06-27 Eric Botcazou <ebotcazou@adacore.com>
+
+ * gnat.dg/sso20.adb: New test.
+
+2025-06-20 Richard Biener <rguenther@suse.de>
+
+ Backported from master:
+ 2024-09-11 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/116674
+ * g++.dg/vect/pr116674.cc: New testcase.
+
+2025-06-19 Jakub Jelinek <jakub@redhat.com>
+
+ Backported from master:
+ 2025-06-19 Jakub Jelinek <jakub@redhat.com>
+
+ PR middle-end/120631
+ * gcc.dg/dfp/bitint-10.c: New test.
+ * gcc.dg/dfp/pr120631.c: New test.
+
+2025-06-19 Jakub Jelinek <jakub@redhat.com>
+
+ Backported from master:
+ 2025-06-18 Jakub Jelinek <jakub@redhat.com>
+
+ PR middle-end/120631
+ * gcc.dg/dfp/bitint-9.c: New test.
+
+2025-06-13 Georg-Johann Lay <avr@gjlay.de>
+
+ Backported from master:
+ 2025-06-12 Georg-Johann Lay <avr@gjlay.de>
+
+ PR middle-end/117811
+ PR testsuite/52641
+ * gcc.dg/torture/pr117811.c: Fix for int < 32 bit.
+
+2025-06-13 Richard Earnshaw <rearnsha@arm.com>
+
+ Backported from master:
+ 2025-03-25 Richard Earnshaw <rearnsha@arm.com>
+
+ PR middle-end/117811
+ * gcc.dg/torture/pr117811.c: New test.
+
+2025-06-13 Jakub Jelinek <jakub@redhat.com>
+
+ Backported from master:
+ 2025-06-12 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/120638
+ * gcc.dg/pr120638.c: New test.
+
+2025-06-13 Jakub Jelinek <jakub@redhat.com>
+
+ Backported from master:
+ 2025-06-05 Jakub Jelinek <jakub@redhat.com>
+
+ PR middle-end/120547
+ * gcc.dg/bitint-123.c: New test.
+
+2025-06-05 Eric Botcazou <ebotcazou@adacore.com>
+
+ * gnat.dg/specs/opt7.ads: New test.
+ * gnat.dg/specs/opt7_pkg.ads: New helper.
+ * gnat.dg/specs/opt7_pkg.adb: Likewise.
+
+2025-06-02 Jason Merrill <jason@redhat.com>
+
+ PR c++/120123
+ * g++.dg/cpp2a/concepts-lambda24.C: New test.
+
+2025-05-30 Jakub Jelinek <jakub@redhat.com>
+
+ Backported from master:
+ 2025-05-30 Jakub Jelinek <jakub@redhat.com>
+
+ PR target/120480
+ * gcc.dg/pr120480.c: New test.
+
+2025-05-30 Jakub Jelinek <jakub@redhat.com>
+
+ Backported from master:
+ 2025-04-17 Jakub Jelinek <jakub@redhat.com>
+
+ PR target/119834
+ * g++.target/s390/pr119834.C: New test.
+
+2025-05-27 Patrick Palka <ppalka@redhat.com>
+
+ Backported from master:
+ 2025-05-15 Patrick Palka <ppalka@redhat.com>
+
+ PR c++/120161
+ * g++.dg/template/unify13.C: New test.
+
+2025-05-26 Jakub Jelinek <jakub@redhat.com>
+
+ Backported from master:
+ 2025-02-05 Jakub Jelinek <jakub@redhat.com>
+
+ PR rtl-optimization/117239
+ * gcc.dg/pr117239.c: New test.
+
+2025-05-26 Jakub Jelinek <jakub@redhat.com>
+
+ Backported from master:
+ 2024-11-28 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/117358
+ * gcc.c-torture/compile/pr117358.c: New test.
+
+2025-05-25 Harald Anlauf <anlauf@gmx.de>
+
+ Backported from master:
+ 2025-05-15 Harald Anlauf <anlauf@gmx.de>
+
+ PR fortran/85750
+ * gfortran.dg/alloc_comp_auto_array_3.f90: Adjust scan counts.
+ * gfortran.dg/alloc_comp_class_3.f03: Remove bogus warnings.
+ * gfortran.dg/alloc_comp_class_4.f03: Likewise.
+ * gfortran.dg/allocate_with_source_14.f03: Adjust scan count.
+ * gfortran.dg/derived_constructor_comps_6.f90: Likewise.
+ * gfortran.dg/derived_result_5.f90: New test.
+
+2025-05-25 Harald Anlauf <anlauf@gmx.de>
+
+ Backported from master:
+ 2024-08-30 Harald Anlauf <anlauf@gmx.de>
+
+ PR fortran/98454
+ * gfortran.dg/alloc_comp_class_4.f03: Remove bogus pattern.
+ * gfortran.dg/pdt_26.f03: Adjust expected count.
+ * gfortran.dg/derived_result_3.f90: New test.
+
2025-05-23 Release Manager
* GCC 14.3.0 released.
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/c-c++-common/Warray-bounds-11.c
@@ -0,0 +1,21 @@
+/* PR c++/120954 */
+/* { dg-do compile } */
+/* { dg-options "-O2 -Warray-bounds=2" } */
+
+static const int a[32] = { 11, 12, 13, 14, 15 };
+static const int b[32] = { 21, 22, 23, 24, 25 };
+static const int c[32] = { 31, 32, 33, 34, 35 };
+static const int d[32] = { 111, 112, 113, 114, 115 };
+static const int e[32] = { 121, 122, 123, 124, 125 };
+static const int f[32] = { 131, 132, 133, 134, 135 };
+
+int
+foo (int x, int y)
+{
+ int r = 0;
+ if (x >= 0 && x < 32)
+ r = (y >= 4 ? (y >= 0x65 ? a : b ) : c)[x];
+ else if (x >= 0x100 && x < 0x120)
+ r = (y >= 4 ? (y >= 0x65 ? d : e ) : f)[x - 0x100];
+ return r;
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/g++.dg/cpp0x/constexpr-array29.C
@@ -0,0 +1,13 @@
+// PR c++/87097
+// { dg-do compile { target c++11 } }
+
+struct A {
+ constexpr A() : data() {}
+ struct X { int n; };
+ X data[2];
+};
+
+static_assert((A(), true), "");
+static_assert(A().data[0].n == 0, "");
+static_assert(A().data[1].n == 0, "");
+constexpr A x;
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/g++.dg/cpp0x/constexpr-array30.C
@@ -0,0 +1,22 @@
+// PR c++/120800
+// { dg-do compile { target c++11 } }
+
+template<typename T>
+struct Container
+{
+ T m_data[1] {};
+};
+
+class Element
+{
+private:
+ Element() = default;
+
+private:
+ bool m_bool1 { false };
+ bool m_bool2;
+
+ friend struct Container<Element>;
+};
+
+Container<Element> element;
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/g++.dg/cpp2a/concepts-lambda24.C
@@ -0,0 +1,13 @@
+// PR c++/120123
+// { dg-do compile { target c++20 } }
+
+struct H {
+ void member(int) {}
+ void call() {
+ [this]() {
+ [this](const auto& v)
+ requires requires { /*this->*/member(v); }
+ { return member(v); }(0);
+ };
+ }
+};
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/g++.dg/cpp2a/constexpr-dynamic19.C
@@ -0,0 +1,10 @@
+// PR c++/120620
+// { dg-do compile }
+
+#include <cxxabi.h>
+
+struct A* a;
+
+void f() {
+ void* const p = abi::__dynamic_cast(&a, 0, 0, 42);
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/g++.dg/cpp2a/constexpr-dynamic1a.C
@@ -0,0 +1,6 @@
+// Test that including <cxxabi.h>, whence the actual abi:__dynamic_cast
+// is declared, doesn't affect our constexpr dynamic_cast handling.
+// { dg-do compile { target c++20 } }
+
+#include <cxxabi.h>
+#include "constexpr-dynamic1.C"
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/g++.dg/cpp2a/constexpr-union9.C
@@ -0,0 +1,33 @@
+// PR c++/120577
+// { dg-do compile { target c++20 } }
+
+template <class _Tp> struct optional {
+ union {
+ _Tp __val_;
+ };
+ template <class... _Args>
+ constexpr optional(_Args... __args)
+ : __val_(__args...) {}
+};
+template <class _Tp, class... _Args>
+constexpr optional<_Tp> make_optional(_Args... __args) {
+ return optional<_Tp>(__args...);
+}
+
+struct __non_trivial_if {
+ constexpr __non_trivial_if() {}
+};
+struct allocator : __non_trivial_if {};
+struct __padding {};
+struct __short {
+ [[__no_unique_address__]] __padding __padding_;
+ int __data_;
+};
+struct basic_string {
+ union {
+ __short __s;
+ };
+ [[__no_unique_address__]] allocator __alloc_;
+ constexpr basic_string(int, int) {}
+};
+auto opt = make_optional<basic_string>(4, 'X');
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/g++.dg/parse/pr120471.C
@@ -0,0 +1,42 @@
+// PR c++/120471
+// { dg-do compile }
+
+extern int a1[], a2[], a3[], a4[];
+
+int corge (int);
+
+int
+foo (int p)
+{
+ return (p ? a1 : a2)[1];
+}
+
+int
+bar (int p, int q)
+{
+ return (p ? a1 : a2)[q];
+}
+
+int
+garply (int p, int q)
+{
+ return (p ? a1 : a2)[corge (q)];
+}
+
+int
+baz (int p, int q)
+{
+ return (p ? q ? a1 : a2 : q ? a3 : a4)[1];
+}
+
+int
+qux (int p, int q, int r)
+{
+ return (p ? q ? a1 : a2 : q ? a3 : a4)[r];
+}
+
+int
+fred (int p, int q, int r)
+{
+ return (p ? q ? a1 : a2 : q ? a3 : a4)[corge (r)];
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/g++.dg/parse/pr120940.C
@@ -0,0 +1,18 @@
+// PR c++/120940
+// { dg-do run }
+
+int a[8] = { 1, 2, 3, 4, 5, 6, 7, 8 };
+int b[8] = { 9, 10, 11, 12, 13, 14, 15, 16 };
+
+__attribute__((noipa)) int
+foo (int x, int y)
+{
+ return (x ? a : b)[y];
+}
+
+int
+main ()
+{
+ if (foo (1, 4) != 5 || foo (0, 6) != 15)
+ __builtin_abort ();
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/g++.dg/template/unify13.C
@@ -0,0 +1,18 @@
+// PR c++/120161
+
+template<class T, class U>
+struct mp_list { };
+
+template<class T>
+struct Wrap { struct type { }; };
+
+struct A : mp_list<Wrap<int>::type, void>
+ , mp_list<Wrap<long>::type, void> { };
+
+template<class U>
+void f(mp_list<Wrap<int>::type, U>*);
+
+int main() {
+ A a;
+ f(&a);
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/g++.dg/ubsan/pr120471.C
@@ -0,0 +1,21 @@
+// PR c++/120471
+// { dg-do run }
+// { dg-options "-fsanitize=undefined" }
+
+volatile int b[1], a[1];
+
+void
+foo (int x)
+{
+ volatile int c = 21;
+ volatile int v = (x % 2 ? b : a)[c % 3];
+ if (v != 0)
+ __builtin_abort ();
+}
+
+int
+main ()
+{
+ foo (1);
+ foo (2);
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/g++.dg/vect/pr116674.cc
@@ -0,0 +1,85 @@
+// { dg-do compile }
+// { dg-require-effective-target c++11 }
+// { dg-additional-options "-Ofast" }
+// { dg-additional-options "-march=x86-64-v3" { target { x86_64-*-* i?86-*-* } } }
+
+namespace std {
+ typedef int a;
+ template <typename> struct b;
+ template <typename> class aa {};
+ template <typename c> c d(c e, c) { return e; }
+ template <typename c> struct b<aa<c>> {
+ using f = c;
+ using g = c *;
+ template <typename h> using j = aa<h>;
+ };
+} // namespace std
+namespace l {
+ template <typename ab> struct m : std::b<ab> {
+ typedef std::b<ab> n;
+ typedef typename n::f &q;
+ template <typename c> struct ac { typedef typename n::j<c> ad; };
+ };
+} // namespace l
+namespace std {
+ template <typename c, typename ab> struct o {
+ typedef typename l::m<ab>::ac<c>::ad ae;
+ typedef typename l::m<ae>::g g;
+ struct p {
+ g af;
+ };
+ struct ag : p {
+ ag(ae) {}
+ };
+ typedef ab u;
+ o(a, u e) : ah(e) {}
+ ag ah;
+ };
+ template <typename c, typename ab = aa<c>> class r : o<c, ab> {
+ typedef o<c, ab> s;
+ typedef typename s::ae ae;
+ typedef l::m<ae> w;
+
+ public:
+ c f;
+ typedef typename w::q q;
+ typedef a t;
+ typedef ab u;
+ r(t x, u e = u()) : s(ai(x, e), e) {}
+ q operator[](t x) { return *(this->ah.af + x); }
+ t ai(t x, u) { return x; }
+ };
+ extern "C" __attribute__((__simd__)) double exp(double);
+} // namespace std
+using namespace std;
+int ak;
+double v, y;
+void am(double, int an, double, double, double, double, double, double, double,
+ double, double, double, int, double, double, double, double,
+ r<double> ap, double, double, double, double, double, double, double,
+ double, r<double> ar, r<double> as, double, double, r<double> at,
+ r<double> au, r<double> av, double, double) {
+ double ba;
+ for (int k;;)
+ for (int i; i < an; ++i) {
+ y = i;
+ v = d(y, 25.0);
+ ba = exp(v);
+ ar[i * (ak + 1)] = ba;
+ as[i * (ak + 1)] = ar[i * (ak + 1)];
+ if (k && ap[k]) {
+ at[i * (ak + 1)] = av[i * (ak + 1)] = as[i * (ak + 1)];
+ au[i * (ak + 1)] = ar[i * (ak + 1)];
+ } else {
+ au[i * (ak + 1)] = ba;
+ at[i * (ak + 1)] = av[i * (ak + 1)] = k;
+ }
+ }
+}
+void b(int bc) {
+ double bd, be, bf, bg, bh, ao, ap, bn, bo, bp, bq, br, bs, bt, bu, bv, bw, bx,
+ by, aq, ar, as, bz, ca, at, au, av, cb, aw;
+ int bi;
+ am(bh, bc, bi, bi, bi, bi, bv, bw, bx, by, bu, bt, bi, ao, bn, bo, bp, ap, bq,
+ br, bs, bd, be, bf, bg, aq, ar, as, bz, ca, at, au, av, cb, aw);
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/g++.dg/warn/Wduplicated-branches9.C
@@ -0,0 +1,11 @@
+// PR c++/120940
+// { dg-do compile }
+// { dg-options "-Wduplicated-branches" }
+
+static char a[16][8], b[16][8];
+
+char *
+foo (int x, int y)
+{
+ return (x ? a : b)[y];
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/g++.target/aarch64/sme/sme_throw_1.C
@@ -0,0 +1,56 @@
+/* { dg-do run { target { aarch64*-linux-gnu* && aarch64_sme_hw } } } */
+/* { dg-options "-fnon-call-exceptions" } */
+
+#include <signal.h>
+#include <arm_sme.h>
+
+static bool caught;
+
+[[gnu::noipa]] void thrower(int)
+{
+ throw 1;
+}
+
+[[gnu::noipa]] void bar()
+{
+ *(volatile int *)0 = 0;
+}
+
+[[gnu::noipa]] void foo()
+{
+ try
+ {
+ bar();
+ }
+ catch (int)
+ {
+ caught = true;
+ }
+}
+
+__arm_new("za") __arm_locally_streaming void sme_user()
+{
+ svbool_t all = svptrue_b8();
+ for (unsigned int i = 0; i < svcntb(); ++i)
+ {
+ svint8_t expected = svindex_s8(i + 1, i);
+ svwrite_hor_za8_m(0, i, all, expected);
+ }
+ foo();
+ for (unsigned int i = 0; i < svcntb(); ++i)
+ {
+ svint8_t expected = svindex_s8(i + 1, i);
+ svint8_t actual = svread_hor_za8_m(svdup_s8(0), all, 0, i);
+ if (svptest_any(all, svcmpne(all, expected, actual)))
+ __builtin_abort();
+ }
+ if (!caught)
+ __builtin_abort();
+}
+
+int main()
+{
+ signal(SIGSEGV, thrower);
+ sme_user();
+ return 0;
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/g++.target/aarch64/sme/sme_throw_2.C
@@ -0,0 +1,4 @@
+/* { dg-do run { target { aarch64*-linux-gnu* && aarch64_sme_hw } } } */
+/* { dg-options "-O2 -fnon-call-exceptions" } */
+
+#include "sme_throw_1.C"
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/g++.target/aarch64/sve/pr121449.C
@@ -0,0 +1,44 @@
+/* PR target/121449 */
+/* { dg-do assemble { target aarch64_asm_sve_ok } } */
+/* { dg-options "-O3 -save-temps" } */
+
+struct example;
+
+struct array {
+ unsigned length();
+ example *operator[](unsigned i) {
+ example **data = reinterpret_cast<example **>(this);
+ return data[i];
+ }
+};
+
+struct example {
+ int a[16];
+ bool is_even;
+ int version;
+ int count() { return is_even ? 2 : 1; }
+ void fun1(int, long);
+ void fun2(unsigned, unsigned);
+ void process(array &, array &);
+};
+
+bool found;
+
+void example::process(array &a, array &b) {
+ for (unsigned i = 1; a.length(); i++) {
+ long total = 0;
+ for (unsigned k = 0; k <= i; k++) {
+ total += a[k]->count();
+ }
+ for (unsigned j = 0; j < i; j++) {
+ int major = b[j]->version;
+ if (found)
+ major += i;
+ fun1(i + 1, total);
+ fun2(j, major);
+ }
+ }
+}
+
+/* { dg-final { scan-assembler-not {\tld1b\t(z[0-9]+)\.d, p[0-7]/z, \[(z[0-9]+)\.d, #64\]} } } */
+
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/g++.target/s390/pr119834.C
@@ -0,0 +1,76 @@
+// PR target/119834
+// { dg-do compile { target c++11 } }
+// { dg-options "-O2 -march=z900" }
+
+int *a;
+struct A;
+struct B {
+ A begin ();
+ A end ();
+ operator bool * ();
+ void operator++ ();
+};
+template <typename T>
+auto operator| (int, T x) -> decltype (x (0));
+struct A : B { bool a; };
+struct C { A operator () (int); };
+enum D {} d;
+int e;
+void foo ();
+struct E {
+ template <typename T>
+ T *garply ()
+ {
+ if (d)
+ return 0;
+ if (e)
+ foo ();
+ return reinterpret_cast<T *> (f);
+ }
+ template <typename>
+ void bar (long x, bool)
+ {
+ if (&g - f)
+ __builtin_memset (a, 0, x);
+ f += x;
+ }
+ template <typename T>
+ T *baz (T *x, long y, bool z = true)
+ {
+ if (d)
+ return nullptr;
+ bar<T> ((char *)x + y - f, z);
+ return x;
+ }
+ template <typename T>
+ void qux (T x) { baz (x, x->j); }
+ char *f, g;
+} *h;
+struct F {
+ template <typename T>
+ int corge (T x) { x.freddy (this); return 0; }
+ template <typename T>
+ int boo (T x) { corge (x); return 0; }
+} i;
+template <typename T>
+struct G {
+ template <typename U> friend T operator+ (U, G);
+ template <typename U>
+ void waldo (F *x, G y, U z) { x->boo (z + y); }
+ template <typename... Ts>
+ void plugh (E *y, Ts... z) { T *x = y->garply<T> (); x->thud (y, z...); }
+};
+template <typename T> using H = G<T>;
+struct I {
+ static constexpr unsigned j = 2;
+ void thud (E *x, A y) { x->qux (this); for (auto g : y) ; }
+};
+H<I> k;
+struct J {
+ void freddy (F *) { C a; auto b = 0 | a; k.plugh (h, b); }
+};
+H<J> l;
+struct K {
+ void freddy () { l.waldo (&i, l, this); }
+};
+void grault () { K m; m.freddy (); }
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.c-torture/compile/pr117358.c
@@ -0,0 +1,17 @@
+/* PR tree-optimization/117358 */
+
+char a;
+/* This attribute is bogus, snprintf isn't const. Just verify we don't ICE on it. */
+int __attribute__((const)) snprintf (char *, __SIZE_TYPE__, const char *, ...);
+
+long
+foo (long d)
+{
+ return snprintf (&a, d, "");
+}
+
+int
+bar (void)
+{
+ return foo (1);
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.dg/bitint-123.c
@@ -0,0 +1,26 @@
+/* PR middle-end/120547 */
+/* { dg-do run { target bitint } } */
+/* { dg-options "-O2" } */
+/* { dg-add-options float64 } */
+/* { dg-require-effective-target float64 } */
+
+#define CHECK(x, y) \
+ if ((_Float64) x != (_Float64) y \
+ || (_Float64) (x + 1) != (_Float64) (y + 1)) \
+ __builtin_abort ()
+
+int
+main ()
+{
+ unsigned long long a = 0x20000000000001ULL << 7;
+ volatile unsigned long long b = a;
+ CHECK (a, b);
+#if __BITINT_MAXWIDTH__ >= 4096
+ unsigned _BitInt(4096) c = ((unsigned _BitInt(4096)) 0x20000000000001ULL) << 253;
+ volatile unsigned _BitInt(4096) d = c;
+ CHECK (c, d);
+ unsigned _BitInt(4096) e = ((unsigned _BitInt(4096)) 0x20000000000001ULL) << 931;
+ volatile unsigned _BitInt(4096) f = e;
+ CHECK (e, f);
+#endif
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.dg/bitint-124.c
@@ -0,0 +1,30 @@
+/* PR tree-optimization/121131 */
+/* { dg-do run { target bitint } } */
+/* { dg-options "-O2" } */
+
+#if __BITINT_MAXWIDTH__ >= 156
+struct A { _BitInt(156) b : 135; };
+
+static inline _BitInt(156)
+foo (struct A *x)
+{
+ return x[1].b;
+}
+
+__attribute__((noipa)) _BitInt(156)
+bar (void)
+{
+ struct A a[] = { 1, 1, -13055525270329736316393717310914023773847wb,
+ 1, 1, 1, 1, 1, 1, 1, 1, 1 };
+ return foo (&a[1]);
+}
+#endif
+
+int
+main ()
+{
+#if __BITINT_MAXWIDTH__ >= 156
+ if (bar () != -13055525270329736316393717310914023773847wb)
+ __builtin_abort ();
+#endif
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.dg/bitint-125.c
@@ -0,0 +1,15 @@
+/* PR tree-optimization/121127 */
+/* { dg-do compile { target bitint } } */
+/* { dg-options "-O2 -w" } */
+
+#if __BITINT_MAXWIDTH__ >= 576
+_BitInt(575)
+foo (void)
+{
+ _BitInt(576) d;
+ _BitInt(575) e = d * 42wb;
+ return e;
+}
+#else
+int i;
+#endif
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.dg/dfp/bitint-10.c
@@ -0,0 +1,49 @@
+/* PR middle-end/120631 */
+/* { dg-do run { target bitint } } */
+/* { dg-options "-O2" } */
+
+#if __BITINT_MAXWIDTH__ >= 128
+_Decimal128 a = 123456789135792468012345678900000000000.0dl;
+_BitInt(128) b = 123456789135792468012345678900000000000wb;
+_Decimal64 c = 12345678913579000000000000000000000000.0dd;
+_BitInt(127) d = 12345678913579000000000000000000000000wb;
+#endif
+#if __BITINT_MAXWIDTH__ >= 256
+_Decimal128 m = 1234567891357924680123456789000000000000000000000000000000000000000000000000.0dl;
+_BitInt(256) n = 1234567891357924680123456789000000000000000000000000000000000000000000000000wb;
+_Decimal64 o = 1234567891357900000000000000000000000000000000000000000000000000000000000000.0dd;
+_BitInt(255) p = 1234567891357900000000000000000000000000000000000000000000000000000000000000wb;
+#endif
+
+int
+main ()
+{
+#if __BITINT_MAXWIDTH__ >= 128
+ if (a != b || (_BitInt(128)) a != b || c != d || (_BitInt(127)) c != d)
+ __builtin_abort ();
+ _Decimal128 e = 123456789135792468012345678900000000000.0dl;
+ _BitInt(128) f = 123456789135792468012345678900000000000wb;
+ _Decimal128 g = 123456789135792468012345678900000000000wb;
+ _BitInt(128) h = 123456789135792468012345678900000000000.0dl;
+ _Decimal64 i = 12345678913579000000000000000000000000.0dd;
+ _BitInt(128) j = 12345678913579000000000000000000000000wb;
+ _Decimal64 k = 12345678913579000000000000000000000000wb;
+ _BitInt(128) l = 12345678913579000000000000000000000000.0dd;
+ if (e != g || f != h || i != k || j != l)
+ __builtin_abort ();
+#endif
+#if __BITINT_MAXWIDTH__ >= 256
+ if (m != n || (_BitInt(256)) m != n || o != p || (_BitInt(255)) o != p)
+ __builtin_abort ();
+ _Decimal128 q = 1234567891357924680123456789000000000000000000000000000000000000000000000000.0dl;
+ _BitInt(256) r = 1234567891357924680123456789000000000000000000000000000000000000000000000000wb;
+ _Decimal128 s = 1234567891357924680123456789000000000000000000000000000000000000000000000000wb;
+ _BitInt(256) t = 1234567891357924680123456789000000000000000000000000000000000000000000000000.0dl;
+ _Decimal64 u = 1234567891357900000000000000000000000000000000000000000000000000000000000000.0dd;
+ _BitInt(255) v = 1234567891357900000000000000000000000000000000000000000000000000000000000000wb;
+ _Decimal64 w = 1234567891357900000000000000000000000000000000000000000000000000000000000000wb;
+ _BitInt(255) x = 1234567891357900000000000000000000000000000000000000000000000000000000000000.0dd;
+ if (q != s || r != t || u != w || v != x)
+ __builtin_abort ();
+#endif
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.dg/dfp/bitint-9.c
@@ -0,0 +1,29 @@
+/* PR middle-end/120631 */
+/* { dg-do run { target bitint } } */
+/* { dg-options "-O2" } */
+
+#if __BITINT_MAXWIDTH__ >= 2048
+_Decimal128 a = 123456789135792468012345678900000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000.0dl;
+_BitInt(2048) b = 123456789135792468012345678900000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000wb;
+_Decimal64 c = 123456789135790000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000.0dd;
+_BitInt(1536) d = 123456789135790000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000wb;
+#endif
+
+int
+main ()
+{
+#if __BITINT_MAXWIDTH__ >= 2048
+ if (a != b || (_BitInt(2048)) a != b || c != d || (_BitInt(1536)) c != d)
+ __builtin_abort ();
+ _Decimal128 e = 123456789135792468012345678900000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000.0dl;
+ _BitInt(2048) f = 123456789135792468012345678900000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000wb;
+ _Decimal128 g = 123456789135792468012345678900000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000wb;
+ _BitInt(2048) h = 123456789135792468012345678900000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000.0dl;
+ _Decimal64 i = 123456789135790000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000.0dd;
+ _BitInt(1536) j = 123456789135790000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000wb;
+ _Decimal64 k = 123456789135790000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000wb;
+ _BitInt(1536) l = 123456789135790000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000.0dd;
+ if (e != g || f != h || i != k || j != l)
+ __builtin_abort ();
+#endif
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.dg/dfp/pr120631.c
@@ -0,0 +1,25 @@
+/* PR middle-end/120631 */
+/* { dg-do run } */
+/* { dg-options "-O2" } */
+
+_Decimal64 a = 1234567891357900000.0dd;
+long long b = 1234567891357900000LL;
+_Decimal32 c = 1234567000000000000.0df;
+long long d = 1234567000000000000LL;
+
+int
+main ()
+{
+ if (a != b || (long long) a != b || c != d || (long long) c != d)
+ __builtin_abort ();
+ _Decimal64 e = 1234567891357900000.0dd;
+ long long f = 1234567891357900000LL;
+ _Decimal64 g = 1234567891357900000LL;
+ long long h = 1234567891357900000.0dd;
+ _Decimal32 i = 1234567000000000000.0df;
+ long long j = 1234567000000000000LL;
+ _Decimal32 k = 1234567000000000000LL;
+ long long l = 1234567000000000000.0df;
+ if (e != g || f != h || i != k || j != l)
+ __builtin_abort ();
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.dg/pr117239.c
@@ -0,0 +1,42 @@
+/* PR rtl-optimization/117239 */
+/* { dg-do run } */
+/* { dg-options "-fno-inline -O2" } */
+/* { dg-additional-options "-fschedule-insns" { target i?86-*-* x86_64-*-* } } */
+
+int a, b, c = 1, d;
+
+int
+foo (void)
+{
+ return a;
+}
+
+struct A {
+ int e, f, g, h;
+ short i;
+ int j;
+};
+
+void
+bar (int x, struct A y)
+{
+ if (y.j == 1)
+ c = 0;
+}
+
+int
+baz (struct A x)
+{
+ return b;
+}
+
+int
+main ()
+{
+ struct A k = { 0, 0, 0, 0, 0, 1 };
+ d = baz (k);
+ bar (foo (), k);
+ if (c != 0)
+ __builtin_abort ();
+ return 0;
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.dg/pr120480.c
@@ -0,0 +1,11 @@
+/* PR target/120480 */
+/* { dg-do compile } */
+/* { dg-options "-O0" } */
+
+struct S { int a, b, c; } s;
+
+void
+foo (void)
+{
+ struct S t = s;
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.dg/pr120638.c
@@ -0,0 +1,31 @@
+/* PR tree-optimization/120638 */
+/* { dg-do run } */
+/* { dg-options "-O2 -ffast-math" } */
+
+extern float sqrtf (float x);
+
+__attribute__((noipa)) float
+foo (unsigned int s)
+{
+ return 0.5f / sqrtf (1.f + s);
+}
+
+__attribute__((noipa)) float
+bar (float s)
+{
+ if (s < 0.0 || s > 65535.0f)
+ __builtin_unreachable ();
+ return 0.5f / sqrtf (1.f + s);
+}
+
+int
+main ()
+{
+ if (__builtin_fabsf (foo (3) - 0.25f) > 0.00390625f
+ || __builtin_fabsf (foo (15) - 0.125f) > 0.00390625f
+ || __builtin_fabsf (foo (63) - 0.0625f) > 0.00390625f
+ || __builtin_fabsf (bar (3.0f) - 0.25f) > 0.00390625f
+ || __builtin_fabsf (bar (15.0f) - 0.125f) > 0.00390625f
+ || __builtin_fabsf (bar (63.0f) - 0.0625f) > 0.00390625f)
+ __builtin_abort ();
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.dg/pr121322.c
@@ -0,0 +1,14 @@
+/* PR middle-end/121322 */
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+unsigned long long
+foo (unsigned long long *p)
+{
+ unsigned long long a = *p;
+ unsigned long long b = __builtin_bswap64 (a);
+ return ((b << 32)
+ | ((b >> 8) & 0xff000000ULL)
+ | ((b >> 24) & 0xff0000ULL)
+ | ((b >> 40) & 0xff00ULL));
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.dg/torture/bitint-85.c
@@ -0,0 +1,34 @@
+/* { dg-do run { target bitint } } */
+/* { dg-options "-std=c23 -pedantic-errors" } */
+/* { dg-skip-if "" { ! run_expensive_tests } { "*" } { "-O0" "-O2" } } */
+/* { dg-skip-if "" { ! run_expensive_tests } { "-flto" } { "" } } */
+
+#if __BITINT_MAXWIDTH__ >= 1024
+constexpr _BitInt(1024) d = -541140097068598424394740839221562143161511518875518765552323978870598341733206554363735813878577506997168480201818027232521wb;
+int c;
+
+static inline void
+foo (_BitInt(1024) b, _BitInt(1024) *r)
+{
+ if (c)
+ b = 0;
+ *r = b;
+}
+
+[[gnu::noipa]] void
+bar (_BitInt(1024) y)
+{
+ if (y != d)
+ __builtin_abort ();
+}
+#endif
+
+int
+main ()
+{
+#if __BITINT_MAXWIDTH__ >= 1024
+ _BitInt(1024) x;
+ foo (d, &x);
+ bar (x);
+#endif
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.dg/torture/pr117811.c
@@ -0,0 +1,32 @@
+/* { dg-do run } */
+
+#include <string.h>
+
+typedef int v4 __attribute__((vector_size (4 * sizeof (int))));
+
+void __attribute__((noclone,noinline)) do_shift (v4 *vec, int shift)
+{
+ v4 t = *vec;
+
+ if (shift > 0)
+ {
+ t = t >> shift;
+ }
+
+ *vec = t;
+}
+
+int main ()
+{
+#if __SIZEOF_INT__ >= 4
+ v4 vec = {0x1000000, 0x2000, 0x300, 0x40};
+ v4 vec2 = {0x100000, 0x200, 0x30, 0x4};
+#else
+ v4 vec = {0x4000, 0x2000, 0x300, 0x40};
+ v4 vec2 = {0x400, 0x200, 0x30, 0x4};
+#endif
+ do_shift (&vec, 4);
+ if (memcmp (&vec, &vec2, sizeof (v4)) != 0)
+ __builtin_abort ();
+ return 0;
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr117423.c
@@ -0,0 +1,49 @@
+/* { dg-do run } */
+/* { dg-options "-O1" } */
+
+struct s4 {
+ int _0;
+};
+struct s1 {
+ unsigned char _4;
+ long _1;
+};
+struct s2 {
+ union {
+ struct s3 {
+ unsigned char _1;
+ struct s4 _0;
+ } var_0;
+ struct s1 var_1;
+ } DATA;
+};
+int f1(int arg0) { return arg0 > 12345; }
+__attribute__((noinline))
+struct s4 f2(int arg0) {
+ struct s4 rv = {arg0};
+ return rv;
+}
+struct s2 f3(int arg0) {
+ struct s2 rv;
+ struct s1 var6 = {0};
+ struct s4 var7;
+ if (f1(arg0)) {
+ rv.DATA.var_1 = var6;
+ return rv;
+ } else {
+ rv.DATA.var_0._1 = 2;
+ var7 = f2(arg0);
+ rv.DATA.var_0._0 = var7;
+ return rv;
+ }
+}
+int main() {
+ if (f3(12345).DATA.var_0._0._0 == 12345)
+ ;
+ else
+ __builtin_abort();
+ if (f3(12344).DATA.var_0._0._0 == 12344)
+ ;
+ else
+ __builtin_abort();
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr119085.c
@@ -0,0 +1,37 @@
+/* { dg-do run } */
+/* { dg-options "-O1" } */
+
+struct with_hole {
+ int x;
+ long y;
+};
+struct without_hole {
+ int x;
+ int y;
+};
+union u {
+ struct with_hole with_hole;
+ struct without_hole without_hole;
+};
+
+void __attribute__((noinline))
+test (union u *up, union u u)
+{
+ union u u2;
+ volatile int f = 0;
+ u2 = u;
+ if (f)
+ u2.with_hole = u.with_hole;
+ *up = u2;
+}
+
+int main(void)
+{
+ union u u;
+ union u u2;
+ u2.without_hole.y = -1;
+ test (&u, u2);
+ if (u.without_hole.y != -1)
+ __builtin_abort ();
+ return 0;
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.dg/ubsan/pr120837.c
@@ -0,0 +1,32 @@
+/* PR c/120837 */
+/* { dg-do run } */
+/* { dg-options "-O1 -fsanitize=undefined -fno-sanitize-recover=undefined" } */
+
+[[gnu::noipa]] void
+bar (void **x, void **y)
+{
+ x[0] = 0;
+ x[1] = 0;
+ x[2] = 0;
+ y[0] = 0;
+ y[1] = 0;
+ y[2] = 0;
+ y[3] = 0;
+ y[4] = 0;
+}
+
+[[gnu::noipa]] void *
+foo (int x, int y)
+{
+ void *a[3];
+ void *b[5];
+ bar (a, b);
+ return (x > y ? b : a)[y - 1];
+}
+
+int
+main ()
+{
+ if (foo (2, 1) != 0)
+ __builtin_abort ();
+}
--- a/src/gcc/testsuite/gcc.dg/vect/tsvc/vect-tsvc-s332.c
+++ b/src/gcc/testsuite/gcc.dg/vect/tsvc/vect-tsvc-s332.c
@@ -3,6 +3,7 @@
/* { dg-additional-options "--param vect-epilogues-nomask=0" } */
/* { dg-require-effective-target vect_float } */
+/* { dg-require-effective-target vect_early_break_hw } */
/* { dg-add-options vect_early_break } */
#include "tsvc.h"
--- a/src/gcc/testsuite/gcc.dg/vect/tsvc/vect-tsvc-s481.c
+++ b/src/gcc/testsuite/gcc.dg/vect/tsvc/vect-tsvc-s481.c
@@ -3,6 +3,7 @@
/* { dg-additional-options "--param vect-epilogues-nomask=0" } */
/* { dg-require-effective-target vect_float } */
+/* { dg-require-effective-target vect_early_break_hw } */
/* { dg-add-options vect_early_break } */
#include "tsvc.h"
--- a/src/gcc/testsuite/gcc.dg/vect/tsvc/vect-tsvc-s482.c
+++ b/src/gcc/testsuite/gcc.dg/vect/tsvc/vect-tsvc-s482.c
@@ -3,6 +3,7 @@
/* { dg-additional-options "--param vect-epilogues-nomask=0" } */
/* { dg-require-effective-target vect_float } */
+/* { dg-require-effective-target vect_early_break_hw } */
/* { dg-add-options vect_early_break } */
#include "tsvc.h"
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/aarch64/pr121253.c
@@ -0,0 +1,16 @@
+/* { dg-options "-O" } */
+
+struct s128 {
+ long a, b;
+};
+
+struct s128 foo(void) {
+ struct s128 ret;
+ asm("mov %0, #0 \n\t"
+ "mov %R0, #0 \n\t"
+ "mov x0, #12345"
+ : "=r" (ret) : : "x0");
+ return ret;
+}
+
+/* { dg-final { scan-assembler-not {mov x0, #0} } } */
--- a/src/gcc/testsuite/gcc.target/aarch64/sme/call_sm_switch_1.c
+++ b/src/gcc/testsuite/gcc.target/aarch64/sme/call_sm_switch_1.c
@@ -1,5 +1,5 @@
// { dg-options "-O -fomit-frame-pointer -fno-optimize-sibling-calls -funwind-tables" }
-// { dg-final { check-function-bodies "**" "" } }
+// { dg-final { check-function-bodies "**" "" "" { target "*-*-*" } {\t\.inst} } }
void ns_callee ();
void s_callee () [[arm::streaming]];
@@ -218,7 +218,7 @@ sc_caller_x1 (int *ptr, int a) [[arm::streaming_compatible]]
** bl ns_callee_stack
** ldr x16, \[x29, #?16\]
** tbz x16, 0, .*
-** smstart sm
+** .inst 0xd503437f // smstart sm
** ...
*/
void
--- a/src/gcc/testsuite/gcc.target/aarch64/sme/call_sm_switch_11.c
+++ b/src/gcc/testsuite/gcc.target/aarch64/sme/call_sm_switch_11.c
@@ -1,5 +1,6 @@
// { dg-options "-O -fomit-frame-pointer -fno-optimize-sibling-calls -funwind-tables -mtrack-speculation" }
-// { dg-final { check-function-bodies "**" "" } }
+// { dg-final { check-function-bodies "**" "" "" { target "*-*-*" } {\t\.inst} } }
+
void ns_callee ();
void s_callee () [[arm::streaming]];
@@ -196,7 +197,7 @@ sc_caller_x1 (int *ptr, int a) [[arm::streaming_compatible]]
** tst x16, #?1
** beq [^\n]*
** csel x15, x15, xzr, ne
-** smstart sm
+** .inst 0xd503437f // smstart sm
** ...
*/
void
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/aarch64/sme/pr121028.c
@@ -0,0 +1,46 @@
+// PR121028
+// { dg-do assemble { target aarch64_asm_sme_ok } }
+// { dg-options "-O --save-temps" }
+// { dg-final { check-function-bodies "**" "" "" { target "*-*-*" } {\t\.inst} } }
+
+void ns_callee ();
+
+/*
+** sc_caller_sme:
+** ...
+** mrs x16, svcr
+** str x16, \[x29, #?16\]
+** ldr x16, \[x29, #?16\]
+** tbz x16, 0, .*
+** smstop sm
+** bl ns_callee
+** ldr x16, \[x29, #?16\]
+** tbz x16, 0, .*
+** smstart sm
+** ...
+*/
+void sc_caller_sme() __arm_streaming_compatible
+{
+ ns_callee ();
+}
+
+#pragma GCC target "+nosme"
+
+/*
+** sc_caller_nosme:
+** ...
+** bl __arm_sme_state
+** str x0, \[x29, #?16\]
+** ldr x16, \[x29, #?16\]
+** tbz x16, 0, .*
+** .inst 0xd503427f // smstop sm
+** bl ns_callee
+** ldr x16, \[x29, #?16\]
+** tbz x16, 0, .*
+** .inst 0xd503437f // smstart sm
+** ...
+*/
+void sc_caller_nosme() __arm_streaming_compatible
+{
+ ns_callee ();
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/aarch64/sme/pr121414_1.c
@@ -0,0 +1,27 @@
+#pragma GCC target "+sme2"
+
+void f1() __arm_streaming_compatible {}
+void f2() __arm_streaming {}
+void f3() __arm_in("za") {}
+void f4() __arm_out("za") {}
+void f5() __arm_inout("za") {}
+void f6() __arm_in("zt0") {}
+void f7() __arm_out("zt0") {}
+void f8() __arm_inout("zt0") {}
+
+__arm_locally_streaming void g1() {}
+__arm_new("za") void g2() {}
+__arm_new("zt0") void g3() {}
+
+/* { dg-final { scan-assembler {\t\.variant_pcs\tf1\n} } } */
+/* { dg-final { scan-assembler {\t\.variant_pcs\tf2\n} } } */
+/* { dg-final { scan-assembler {\t\.variant_pcs\tf3\n} } } */
+/* { dg-final { scan-assembler {\t\.variant_pcs\tf4\n} } } */
+/* { dg-final { scan-assembler {\t\.variant_pcs\tf5\n} } } */
+/* { dg-final { scan-assembler {\t\.variant_pcs\tf6\n} } } */
+/* { dg-final { scan-assembler {\t\.variant_pcs\tf7\n} } } */
+/* { dg-final { scan-assembler {\t\.variant_pcs\tf8\n} } } */
+
+/* { dg-final { scan-assembler-not {\t\.variant_pcs\tg1\n} } } */
+/* { dg-final { scan-assembler-not {\t\.variant_pcs\tg2\n} } } */
+/* { dg-final { scan-assembler-not {\t\.variant_pcs\tg3\n} } } */
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/aarch64/sme/za_state_7.c
@@ -0,0 +1,21 @@
+// { dg-options "-O -fno-optimize-sibling-calls -fomit-frame-pointer" }
+
+#include <arm_sme.h>
+
+void callee();
+
+__arm_new("za") __arm_locally_streaming int test()
+{
+ svbool_t all = svptrue_b8();
+ svint8_t expected = svindex_s8(1, 1);
+ svwrite_hor_za8_m(0, 0, all, expected);
+
+ callee();
+
+ svint8_t actual = svread_hor_za8_m(svdup_s8(0), all, 0, 0);
+ return svptest_any(all, svcmpne(all, expected, actual));
+}
+
+// { dg-final { scan-assembler {\tbl\t__arm_tpidr2_save\n} } }
+// { dg-final { scan-assembler {\tbl\t__arm_tpidr2_restore\n} } }
+// { dg-final { scan-assembler-times {\tsmstart\tza\n} 2 } }
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/aarch64/sve/acle/general/perm_1.c
@@ -0,0 +1,14 @@
+/* { dg-options "-O2 -msve-vector-bits=256" } */
+
+#include <arm_sve.h>
+typedef svbfloat16_t vls_bfloat16_t __attribute__((arm_sve_vector_bits(32 * 8)));
+svbfloat16_t foo(vls_bfloat16_t a, vls_bfloat16_t b)
+{
+ svbfloat16_t zero = svreinterpret_bf16_f32 (svdup_n_f32 (0.0f));
+ return svzip2_bf16(zero, svuzp1_bf16(a,b));
+}
+
+
+/* { dg-final { scan-assembler-times {\tuzp1\t} 1 } } */
+/* { dg-final { scan-assembler-times {\tzip2\t} 1 } } */
+/* { dg-final { scan-assembler-not {\ttbl\t} } } */
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/aarch64/sve/acle/general/perm_2.c
@@ -0,0 +1,96 @@
+/* { dg-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include <arm_sve.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+** test1:
+** ...
+** ptrue (p[0-3])\.h, all
+** ...
+** trn1 p0\.h, p[0-3]\.h, \1\.h
+** ret
+*/
+svbool_t
+test1 ()
+{
+ return svtrn1_b16 (svptrue_b8 (), svptrue_b16 ());
+}
+
+/*
+** test2:
+** ...
+** ptrue (p[0-3])\.h, all
+** ...
+** trn1 p0\.h, \1\.h, p[0-3]\.h
+** ret
+*/
+svbool_t
+test2 ()
+{
+ return svtrn1_b16 (svptrue_b16 (), svptrue_b8 ());
+}
+
+/*
+** test3:
+** ...
+** ptrue (p[0-3])\.s, all
+** ...
+** trn1 p0\.s, p[0-3]\.s, \1\.s
+** ret
+*/
+svbool_t
+test3 ()
+{
+ return svtrn1_b32 (svptrue_b8 (), svptrue_b32 ());
+}
+
+/*
+** test4:
+** ...
+** ptrue (p[0-3])\.s, all
+** ...
+** trn1 p0\.s, \1\.s, p[0-3]\.s
+** ret
+*/
+svbool_t
+test4 ()
+{
+ return svtrn1_b32 (svptrue_b32 (), svptrue_b8 ());
+}
+
+/*
+** test5:
+** ...
+** ptrue (p[0-3])\.d, all
+** ...
+** trn1 p0\.d, p[0-3]\.d, \1\.d
+** ret
+*/
+svbool_t
+test5 ()
+{
+ return svtrn1_b64 (svptrue_b8 (), svptrue_b64 ());
+}
+
+/*
+** test6:
+** ...
+** ptrue (p[0-3])\.d, all
+** ...
+** trn1 p0\.d, \1\.d, p[0-3]\.d
+** ret
+*/
+svbool_t
+test6 ()
+{
+ return svtrn1_b64 (svptrue_b64 (), svptrue_b8 ());
+}
+
+#ifdef __cplusplus
+}
+#endif
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/aarch64/sve/acle/general/perm_3.c
@@ -0,0 +1,96 @@
+/* { dg-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include <arm_sve.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+** test1:
+** ...
+** ptrue (p[0-3])\.h, all
+** ...
+** trn2 p0\.h, p[0-3]\.h, \1\.h
+** ret
+*/
+svbool_t
+test1 ()
+{
+ return svtrn2_b16 (svptrue_b8 (), svptrue_b16 ());
+}
+
+/*
+** test2:
+** ...
+** ptrue (p[0-3])\.h, all
+** ...
+** trn2 p0\.h, \1\.h, p[0-3]\.h
+** ret
+*/
+svbool_t
+test2 ()
+{
+ return svtrn2_b16 (svptrue_b16 (), svptrue_b8 ());
+}
+
+/*
+** test3:
+** ...
+** ptrue (p[0-3])\.s, all
+** ...
+** trn2 p0\.s, p[0-3]\.s, \1\.s
+** ret
+*/
+svbool_t
+test3 ()
+{
+ return svtrn2_b32 (svptrue_b8 (), svptrue_b32 ());
+}
+
+/*
+** test4:
+** ...
+** ptrue (p[0-3])\.s, all
+** ...
+** trn2 p0\.s, \1\.s, p[0-3]\.s
+** ret
+*/
+svbool_t
+test4 ()
+{
+ return svtrn2_b32 (svptrue_b32 (), svptrue_b8 ());
+}
+
+/*
+** test5:
+** ...
+** ptrue (p[0-3])\.d, all
+** ...
+** trn2 p0\.d, p[0-3]\.d, \1\.d
+** ret
+*/
+svbool_t
+test5 ()
+{
+ return svtrn2_b64 (svptrue_b8 (), svptrue_b64 ());
+}
+
+/*
+** test6:
+** ...
+** ptrue (p[0-3])\.d, all
+** ...
+** trn2 p0\.d, \1\.d, p[0-3]\.d
+** ret
+*/
+svbool_t
+test6 ()
+{
+ return svtrn2_b64 (svptrue_b64 (), svptrue_b8 ());
+}
+
+#ifdef __cplusplus
+}
+#endif
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/aarch64/sve/acle/general/perm_4.c
@@ -0,0 +1,96 @@
+/* { dg-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include <arm_sve.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+** test1:
+** ...
+** ptrue (p[0-3])\.h, all
+** ...
+** zip1 p0\.h, p[0-3]\.h, \1\.h
+** ret
+*/
+svbool_t
+test1 ()
+{
+ return svzip1_b16 (svptrue_b8 (), svptrue_b16 ());
+}
+
+/*
+** test2:
+** ...
+** ptrue (p[0-3])\.h, all
+** ...
+** zip1 p0\.h, \1\.h, p[0-3]\.h
+** ret
+*/
+svbool_t
+test2 ()
+{
+ return svzip1_b16 (svptrue_b16 (), svptrue_b8 ());
+}
+
+/*
+** test3:
+** ...
+** ptrue (p[0-3])\.s, all
+** ...
+** zip1 p0\.s, p[0-3]\.s, \1\.s
+** ret
+*/
+svbool_t
+test3 ()
+{
+ return svzip1_b32 (svptrue_b8 (), svptrue_b32 ());
+}
+
+/*
+** test4:
+** ...
+** ptrue (p[0-3])\.s, all
+** ...
+** zip1 p0\.s, \1\.s, p[0-3]\.s
+** ret
+*/
+svbool_t
+test4 ()
+{
+ return svzip1_b32 (svptrue_b32 (), svptrue_b8 ());
+}
+
+/*
+** test5:
+** ...
+** ptrue (p[0-3])\.d, all
+** ...
+** zip1 p0\.d, p[0-3]\.d, \1\.d
+** ret
+*/
+svbool_t
+test5 ()
+{
+ return svzip1_b64 (svptrue_b8 (), svptrue_b64 ());
+}
+
+/*
+** test6:
+** ...
+** ptrue (p[0-3])\.d, all
+** ...
+** zip1 p0\.d, \1\.d, p[0-3]\.d
+** ret
+*/
+svbool_t
+test6 ()
+{
+ return svzip1_b64 (svptrue_b64 (), svptrue_b8 ());
+}
+
+#ifdef __cplusplus
+}
+#endif
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/aarch64/sve/acle/general/perm_5.c
@@ -0,0 +1,96 @@
+/* { dg-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include <arm_sve.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+** test1:
+** ...
+** ptrue (p[0-3])\.h, all
+** ...
+** zip2 p0\.h, p[0-3]\.h, \1\.h
+** ret
+*/
+svbool_t
+test1 ()
+{
+ return svzip2_b16 (svptrue_b8 (), svptrue_b16 ());
+}
+
+/*
+** test2:
+** ...
+** ptrue (p[0-3])\.h, all
+** ...
+** zip2 p0\.h, \1\.h, p[0-3]\.h
+** ret
+*/
+svbool_t
+test2 ()
+{
+ return svzip2_b16 (svptrue_b16 (), svptrue_b8 ());
+}
+
+/*
+** test3:
+** ...
+** ptrue (p[0-3])\.s, all
+** ...
+** zip2 p0\.s, p[0-3]\.s, \1\.s
+** ret
+*/
+svbool_t
+test3 ()
+{
+ return svzip2_b32 (svptrue_b8 (), svptrue_b32 ());
+}
+
+/*
+** test4:
+** ...
+** ptrue (p[0-3])\.s, all
+** ...
+** zip2 p0\.s, \1\.s, p[0-3]\.s
+** ret
+*/
+svbool_t
+test4 ()
+{
+ return svzip2_b32 (svptrue_b32 (), svptrue_b8 ());
+}
+
+/*
+** test5:
+** ...
+** ptrue (p[0-3])\.d, all
+** ...
+** zip2 p0\.d, p[0-3]\.d, \1\.d
+** ret
+*/
+svbool_t
+test5 ()
+{
+ return svzip2_b64 (svptrue_b8 (), svptrue_b64 ());
+}
+
+/*
+** test6:
+** ...
+** ptrue (p[0-3])\.d, all
+** ...
+** zip2 p0\.d, \1\.d, p[0-3]\.d
+** ret
+*/
+svbool_t
+test6 ()
+{
+ return svzip2_b64 (svptrue_b64 (), svptrue_b8 ());
+}
+
+#ifdef __cplusplus
+}
+#endif
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/aarch64/sve/acle/general/perm_6.c
@@ -0,0 +1,96 @@
+/* { dg-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include <arm_sve.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+** test1:
+** ...
+** ptrue (p[0-3])\.h, all
+** ...
+** uzp1 p0\.h, p[0-3]\.h, \1\.h
+** ret
+*/
+svbool_t
+test1 ()
+{
+ return svuzp1_b16 (svptrue_b8 (), svptrue_b16 ());
+}
+
+/*
+** test2:
+** ...
+** ptrue (p[0-3])\.h, all
+** ...
+** uzp1 p0\.h, \1\.h, p[0-3]\.h
+** ret
+*/
+svbool_t
+test2 ()
+{
+ return svuzp1_b16 (svptrue_b16 (), svptrue_b8 ());
+}
+
+/*
+** test3:
+** ...
+** ptrue (p[0-3])\.s, all
+** ...
+** uzp1 p0\.s, p[0-3]\.s, \1\.s
+** ret
+*/
+svbool_t
+test3 ()
+{
+ return svuzp1_b32 (svptrue_b8 (), svptrue_b32 ());
+}
+
+/*
+** test4:
+** ...
+** ptrue (p[0-3])\.s, all
+** ...
+** uzp1 p0\.s, \1\.s, p[0-3]\.s
+** ret
+*/
+svbool_t
+test4 ()
+{
+ return svuzp1_b32 (svptrue_b32 (), svptrue_b8 ());
+}
+
+/*
+** test5:
+** ...
+** ptrue (p[0-3])\.d, all
+** ...
+** uzp1 p0\.d, p[0-3]\.d, \1\.d
+** ret
+*/
+svbool_t
+test5 ()
+{
+ return svuzp1_b64 (svptrue_b8 (), svptrue_b64 ());
+}
+
+/*
+** test6:
+** ...
+** ptrue (p[0-3])\.d, all
+** ...
+** uzp1 p0\.d, \1\.d, p[0-3]\.d
+** ret
+*/
+svbool_t
+test6 ()
+{
+ return svuzp1_b64 (svptrue_b64 (), svptrue_b8 ());
+}
+
+#ifdef __cplusplus
+}
+#endif
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/aarch64/sve/acle/general/perm_7.c
@@ -0,0 +1,96 @@
+/* { dg-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include <arm_sve.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+** test1:
+** ...
+** ptrue (p[0-3])\.h, all
+** ...
+** uzp2 p0\.h, p[0-3]\.h, \1\.h
+** ret
+*/
+svbool_t
+test1 ()
+{
+ return svuzp2_b16 (svptrue_b8 (), svptrue_b16 ());
+}
+
+/*
+** test2:
+** ...
+** ptrue (p[0-3])\.h, all
+** ...
+** uzp2 p0\.h, \1\.h, p[0-3]\.h
+** ret
+*/
+svbool_t
+test2 ()
+{
+ return svuzp2_b16 (svptrue_b16 (), svptrue_b8 ());
+}
+
+/*
+** test3:
+** ...
+** ptrue (p[0-3])\.s, all
+** ...
+** uzp2 p0\.s, p[0-3]\.s, \1\.s
+** ret
+*/
+svbool_t
+test3 ()
+{
+ return svuzp2_b32 (svptrue_b8 (), svptrue_b32 ());
+}
+
+/*
+** test4:
+** ...
+** ptrue (p[0-3])\.s, all
+** ...
+** uzp2 p0\.s, \1\.s, p[0-3]\.s
+** ret
+*/
+svbool_t
+test4 ()
+{
+ return svuzp2_b32 (svptrue_b32 (), svptrue_b8 ());
+}
+
+/*
+** test5:
+** ...
+** ptrue (p[0-3])\.d, all
+** ...
+** uzp2 p0\.d, p[0-3]\.d, \1\.d
+** ret
+*/
+svbool_t
+test5 ()
+{
+ return svuzp2_b64 (svptrue_b8 (), svptrue_b64 ());
+}
+
+/*
+** test6:
+** ...
+** ptrue (p[0-3])\.d, all
+** ...
+** uzp2 p0\.d, \1\.d, p[0-3]\.d
+** ret
+*/
+svbool_t
+test6 ()
+{
+ return svuzp2_b64 (svptrue_b64 (), svptrue_b8 ());
+}
+
+#ifdef __cplusplus
+}
+#endif
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr121118_1.c
@@ -0,0 +1,16 @@
+/* { dg-options "-O2 -msve-vector-bits=512" } */
+
+typedef __SVBool_t fixed_bool __attribute__((arm_sve_vector_bits(512)));
+
+#define TEST_CONST(NAME, CONST) \
+ fixed_bool \
+ NAME () \
+ { \
+ union { unsigned long long i; fixed_bool pg; } u = { CONST }; \
+ return u.pg; \
+ }
+
+TEST_CONST (test1, 0x02aaaaaaaa)
+TEST_CONST (test2, 0x0155555557)
+TEST_CONST (test3, 0x0013333333333333ULL)
+TEST_CONST (test4, 0x0011111111111113ULL)
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/aarch64/sve/acle/general/rev_2.c
@@ -0,0 +1,27 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+#include <arm_sve.h>
+
+svbool_t test1()
+{
+ return svrev_b16 (svptrue_b16 ());
+}
+
+svbool_t test2()
+{
+ return svrev_b32 (svptrue_b32 ());
+}
+
+svbool_t test3()
+{
+ return svrev_b64 (svptrue_b64 ());
+}
+
+/* { dg-final { scan-assembler {\tptrue\tp[0-7]\.h} } } */
+/* { dg-final { scan-assembler {\tptrue\tp[0-7]\.s} } } */
+/* { dg-final { scan-assembler {\tptrue\tp[0-7]\.d} } } */
+/* { dg-final { scan-assembler-not {\tptrue\tp[0-7]\.b} } } */
+/* { dg-final { scan-assembler {\trev\tp0\.h} } } */
+/* { dg-final { scan-assembler {\trev\tp0\.s} } } */
+/* { dg-final { scan-assembler {\trev\tp0\.d} } } */
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/aarch64/sve/permute_5.c
@@ -0,0 +1,10 @@
+/* { dg-options "-O -msve-vector-bits=256" } */
+
+typedef __SVBfloat16_t vbfloat16 __attribute__((arm_sve_vector_bits(256)));
+
+vbfloat16
+foo (vbfloat16 x, vbfloat16 y)
+{
+ return __builtin_shufflevector (x, y, 0, 2, 1, 3, 16, 19, 17, 18,
+ 8, 9, 10, 11, 23, 22, 21, 20);
+}
--- a/src/gcc/testsuite/gcc.target/i386/cold-attribute-4.c
+++ b/src/gcc/testsuite/gcc.target/i386/cold-attribute-4.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O2" } */
+/* { dg-options "-Oz" } */
#include <string.h>
int
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/i386/pr120427-1.c
@@ -0,0 +1,28 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mtune=sapphirerapids" } */
+/* { dg-final { scan-assembler-not "and\[lq\]?\[\\t \]+\\\$0, \[0-9\]*\\(" } } */
+
+struct __pthread_mutex_s
+{
+ int __lock;
+ unsigned int __count;
+ int __owner;
+ unsigned int __nusers;
+ int __kind;
+ short __spins;
+ short __elision;
+ void *p[2];
+};
+typedef union
+{
+ struct __pthread_mutex_s __data;
+ char __size[40];
+ long int __align;
+} pthread_mutex_t;
+typedef struct { pthread_mutex_t mutex; } __rtld_lock_recursive_t;
+void
+foo (__rtld_lock_recursive_t *lock, int i)
+{
+ lock[i] = (__rtld_lock_recursive_t) {{ { 0, 0, 0, 0, 1,
+ 0, 0, { ((void *)0) , ((void *)0) } } }};
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/i386/pr120427-2.c
@@ -0,0 +1,28 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mtune=sapphirerapids" } */
+/* { dg-final { scan-assembler-not "or\[lq\]?\[\\t \]+\\\$-1, \[0-9\]*\\(" } } */
+
+struct __pthread_mutex_s
+{
+ int __lock;
+ unsigned int __count;
+ int __owner;
+ unsigned int __nusers;
+ int __kind;
+ short __spins;
+ short __elision;
+ void *p[2];
+};
+typedef union
+{
+ struct __pthread_mutex_s __data;
+ char __size[40];
+ long int __align;
+} pthread_mutex_t;
+typedef struct { pthread_mutex_t mutex; } __rtld_lock_recursive_t;
+void
+foo (__rtld_lock_recursive_t *lock, int i)
+{
+ lock[i] = (__rtld_lock_recursive_t) {{ { -1, -1, -1, -1, 1,
+ -1, -1, { ((void *)-1) , ((void *)-1) } } }};
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/i386/pr120427-3.c
@@ -0,0 +1,45 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+typedef int SItype __attribute__ ((mode (SI)));
+typedef unsigned int USItype __attribute__ ((mode (SI)));
+typedef unsigned int UDItype __attribute__ ((mode (DI)));
+typedef UDItype __attribute__ ((__may_alias__)) bar_t;
+
+static inline __attribute__((__always_inline__)) SItype
+bar (const bar_t **p, SItype prec)
+{
+ bar_t mslimb = 0;
+ SItype i = 20;
+ SItype n = ((USItype) prec) % 4;
+ if (n)
+ {
+ prec -= n;
+ if (prec == 0)
+ return 1;
+ mslimb = (*p)[i];
+ }
+ while (mslimb == 0)
+ {
+ prec -= 4;
+ if (prec == 0)
+ return 1;
+ --i;
+ mslimb = (*p)[i];
+ }
+ return prec;
+}
+UDItype
+foo (const bar_t *i, SItype iprec)
+{
+ iprec = bar (&i, iprec);
+ USItype aiprec = iprec < 0 ? -iprec : iprec;
+ bar_t msb = *i;
+ UDItype mantissa = 0;
+ if (aiprec % 4)
+ msb &= ((bar_t) 1 << aiprec) - 1;
+ if (aiprec >= 54)
+ mantissa = (UDItype) msb << 32;
+
+ return (mantissa ^ (UDItype) 0x20000000000000);
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/i386/pr120427-4.c
@@ -0,0 +1,6 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+#include "cold-attribute-4.c"
+
+/* { dg-final { scan-assembler "movl" } } */
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/i386/pr120427-5.c
@@ -0,0 +1,10 @@
+/* { dg-do compile { target { ! ia32 } } } */
+/* { dg-options "-Oz" } */
+
+long long
+func1 (void)
+{
+ return -1;
+}
+/* { dg-final { scan-assembler-times "pushq\[ \\t\]+\\\$-1" 1 } } */
+/* { dg-final { scan-assembler-times "popq\[ \\t\]+%rax" 1 } } */
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/i386/pr120908.c
@@ -0,0 +1,16 @@
+/* { dg-do compile { target { lp64 && fpic } } } */
+/* { dg-options "-O2 -fpic -mtls-dialect=gnu -mcmodel=large" } */
+
+extern __thread long bar1;
+long *
+foo1 (void)
+{
+ return &bar1;
+}
+
+static __thread long bar2;
+long *
+foo2 (void)
+{
+ return &bar2;
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/i386/pr121208-1a.c
@@ -0,0 +1,15 @@
+/* { dg-do compile { target *-*-linux* } } */
+/* { dg-options "-O2 -fPIC -mno-sse -mno-mmx -mno-80387 -mtls-dialect=gnu" } */
+
+extern __thread int bar;
+extern void func (void);
+
+__attribute__((no_caller_saved_registers))
+void
+foo (int error)
+{
+ bar = 1; /* { dg-error -mtls-dialect=gnu2 } */
+ if (error == 0)
+ func ();
+ bar = 0;
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/i386/pr121208-1b.c
@@ -0,0 +1,4 @@
+/* { dg-do compile { target *-*-linux* } } */
+/* { dg-options "-O2 -fPIC -mno-sse -mno-mmx -mno-80387 -mtls-dialect=gnu2" } */
+
+#include "pr121208-1a.c"
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/i386/pr121208-2a.c
@@ -0,0 +1,17 @@
+/* { dg-do compile { target *-*-linux* } } */
+/* { dg-options "-O2 -fPIC -mtls-dialect=gnu" } */
+
+typedef unsigned int uword_t __attribute__ ((mode (__word__)));
+extern __thread int bar;
+extern void func (void);
+
+__attribute__((target("general-regs-only")))
+__attribute__((interrupt))
+void
+foo (void *frame, uword_t error)
+{
+ bar = 1; /* { dg-error -mtls-dialect=gnu2 } */
+ if (error == 0)
+ func ();
+ bar = 0;
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/i386/pr121208-2b.c
@@ -0,0 +1,4 @@
+/* { dg-do compile { target *-*-linux* } } */
+/* { dg-options "-O2 -fPIC -mtls-dialect=gnu2" } */
+
+#include "pr121208-2a.c"
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/i386/pr121208-3a.c
@@ -0,0 +1,17 @@
+/* { dg-do compile { target *-*-linux* } } */
+/* { dg-options "-O2 -fPIC -mtls-dialect=gnu" } */
+
+typedef unsigned int uword_t __attribute__ ((mode (__word__)));
+extern __thread int bar;
+extern void func (void);
+
+__attribute__((target("general-regs-only")))
+__attribute__((interrupt))
+void
+foo (void *frame)
+{
+ bar = 1; /* { dg-error -mtls-dialect=gnu2 } */
+ if (frame == 0)
+ func ();
+ bar = 0;
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/i386/pr121208-3b.c
@@ -0,0 +1,4 @@
+/* { dg-do compile { target *-*-linux* } } */
+/* { dg-options "-O2 -fPIC -mtls-dialect=gnu2" } */
+
+#include "pr121208-3a.c"
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/i386/pr121274.c
@@ -0,0 +1,24 @@
+/* { dg-do compile { target { ! ia32 } } } */
+/* { dg-options "-march=x86-64-v4 -O2" } */
+/* { dg-final { scan-assembler-not "vpextrq" } } */
+/* { dg-final { scan-assembler-not "vpinsrq" } } */
+
+typedef int v16si __attribute__((vector_size(64)));
+typedef int v4si __attribute__((vector_size(16)));
+
+v4si f(v16si x)
+{
+ return __builtin_shufflevector(x, x, 0, 1, 2, 3);
+}
+
+v4si g(v16si x)
+{
+return __builtin_shufflevector(x, x, 4, 5, 6, 7);
+}
+
+v4si f1(__int128 *x)
+{
+ __int128 t = *x;
+ asm("":"+x"(t));
+ return (v4si)t;
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/loongarch/pr121064.c
@@ -0,0 +1,38 @@
+/* { dg-require-effective-target loongarch_sx_hw } */
+/* { dg-do run } */
+/* { dg-options "-march=loongarch64 -mfpu=64 -mlsx -O3" } */
+
+typedef __INT32_TYPE__ int32_t;
+typedef unsigned __INT32_TYPE__ uint32_t;
+
+__attribute__ ((noipa)) static int32_t
+long_filter_ehigh_3830_1 (int32_t *buffer, int length)
+{
+ int i, j;
+ int32_t dotprod = 0;
+ int32_t delay[4] = { 0 };
+ uint32_t coeffs[4] = { 0 };
+
+ for (i = 0; i < length; i++)
+ {
+ dotprod = 0;
+ for (j = 3; j >= 0; j--)
+ {
+ dotprod += delay[j] * coeffs[j];
+ coeffs[j] += ((delay[j] >> 31) | 1);
+ }
+ for (j = 3; j > 0; j--)
+ delay[j] = delay[j - 1];
+ delay[0] = buffer[i];
+ }
+
+ return dotprod;
+}
+
+int
+main ()
+{
+ int32_t buffer[] = { -1, 1 };
+ if (long_filter_ehigh_3830_1 (buffer, 2) != -1)
+ __builtin_trap ();
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/loongarch/pr121542.c
@@ -0,0 +1,54 @@
+/* { dg-do compile } */
+/* { dg-options "-mrecip=all -mfrecipe -mabi=lp64d -march=loongarch64 -mfpu=64 -msimd=lasx -Ofast" } */
+
+typedef long unsigned int STRLEN;
+typedef struct sv SV;
+struct sv
+{
+ void *sv_any;
+ unsigned int sv_refcnt;
+ unsigned int sv_flags;
+};
+typedef struct xpv XPV;
+struct xpv
+{
+ char *xpv_pv;
+ STRLEN xpv_cur;
+ STRLEN xpv_len;
+};
+typedef unsigned long UV;
+extern char *PL_bufend;
+extern char *d;
+SV *Perl_newSV (STRLEN len);
+
+char *
+S_scan_const (char *start)
+{
+ register char *send = PL_bufend;
+ SV *sv = Perl_newSV (send - start);
+ register char *s = start;
+ UV uv;
+
+ while (s < send)
+ {
+ if (!(((UV)(uv)) < 0x80))
+ {
+ int hicount = 0;
+ unsigned char *c;
+ for (c = (unsigned char *)((XPV *)(sv)->sv_any)->xpv_pv;
+ c < (unsigned char *)d; c++)
+ {
+ if (!(((UV)(*c)) < 0x80))
+ {
+ hicount++;
+ }
+ }
+ d += hicount;
+ *d++ = (char)uv;
+ }
+
+ s++;
+ }
+
+ return s;
+}
--- a/src/gcc/testsuite/gcc.target/powerpc/builtin_altivec_tr_stxvr_runnable.c
+++ b/src/gcc/testsuite/gcc.target/powerpc/builtin_altivec_tr_stxvr_runnable.c
@@ -27,10 +27,10 @@ int
main () {
int i;
signed long sl;
- signed char sc, expected_sc;
- signed short ss, expected_ss;
- signed int si, expected_si;
- signed long long int sll, expected_sll;
+ signed char sc[2], expected_sc;
+ signed short ss[2], expected_ss;
+ signed int si[2], expected_si;
+ signed long long int sll[2], expected_sll;
signed char *psc;
signed short *pss;
signed int *psi;
@@ -41,56 +41,56 @@ main () {
printf("Data to store [%d] = 0x%llx %llx\n", i, val.ull[1], val.ull[0]);
#endif
- psc = &sc;
- pss = &ss;
- psi = &si;
- psll = &sll;
+ psc = &sc[0];
+ pss = &ss[0];
+ psi = &si[0];
+ psll = &sll[0];
sl = 1;
- sc = 0xA1;
+ sc[0] = 0xA1;
expected_sc = 0xA1;
__builtin_altivec_tr_stxvrbx (store_data, sl, psc);
- if (expected_sc != sc & 0xFF)
+ if (expected_sc != sc[0] & 0xFF)
#if DEBUG
printf(" ERROR: Signed char = 0x%x doesn't match expected value 0x%x\n",
- sc & 0xFF, expected_sc);
+ sc[0] & 0xFF, expected_sc);
#else
abort();
#endif
- ss = 0x52;
+ ss[0] = 0x52;
expected_ss = 0x1752;
__builtin_altivec_tr_stxvrhx (store_data, sl, pss);
- if (expected_ss != ss & 0xFFFF)
+ if (expected_ss != ss[0] & 0xFFFF)
#if DEBUG
printf(" ERROR: Signed short = 0x%x doesn't match expected value 0x%x\n",
- ss, expected_ss) & 0xFFFF;
+ ss[0], expected_ss) & 0xFFFF;
#else
abort();
#endif
- si = 0x21;
+ si[0] = 0x21;
expected_si = 0x54321721;
__builtin_altivec_tr_stxvrwx (store_data, sl, psi);
- if (expected_si != si)
+ if (expected_si != si[0])
#if DEBUG
printf(" ERROR: Signed int = 0x%x doesn't match expected value 0x%x\n",
- si, expected_si);
+ si[0], expected_si);
#else
abort();
#endif
- sll = 0x12FFULL;
+ sll[0] = 0x12FFULL;
expected_sll = 0xdcba9876543217FF;
__builtin_altivec_tr_stxvrdx (store_data, sl, psll);
- if (expected_sll != sll)
+ if (expected_sll != sll[0])
#if DEBUG
printf(" ERROR: Signed long long int = 0x%llx doesn't match expected value 0x%llx\n",
- sll, expected_sll);
+ sll[0], expected_sll);
#else
abort();
#endif
--- a/src/gcc/testsuite/gcc.target/powerpc/float128-cmp2-runnable.c
+++ b/src/gcc/testsuite/gcc.target/powerpc/float128-cmp2-runnable.c
@@ -1,6 +1,5 @@
/* { dg-do run } */
-/* { dg-require-effective-target ppc_float128_sw } */
-/* { dg-require-effective-target p9vector_hw } */
+/* { dg-require-effective-target ppc_float128_hw } */
/* { dg-options "-O2 -mdejagnu-cpu=power9 " } */
#define NAN_Q __builtin_nanq ("")
--- a/src/gcc/testsuite/gcc.target/powerpc/vsx-builtin-7.c
+++ b/src/gcc/testsuite/gcc.target/powerpc/vsx-builtin-7.c
@@ -1,7 +1,15 @@
/* { dg-do compile { target { powerpc*-*-* } } } */
/* { dg-skip-if "" { powerpc*-*-darwin* } } */
/* { dg-require-effective-target powerpc_vsx_ok } */
-/* { dg-options "-O2 -mdejagnu-cpu=power7 -fno-inline-functions" } */
+/* { dg-options "-O2 -mdejagnu-cpu=power7 -fno-inline-functions -fno-ipa-icf" } */
+
+/* PR testsuite/119382
+ Note: Added -fno-ipa-icf to disable Interprocedural Identical Code
+ Folding (ICF). Without this, insert_di_0_v2 is merged with insert_di_0
+ due to improved alias analysis introduced in commit r15-7961-gdc47161c1f32c3.
+ This results in the compiler replacing insert_di_0_v2 with a tail call to
+ insert_di_0, altering expected test behavior. Disabling ICF ensures correct
+ execution of the test. */
/* Test simple extract/insert/slat operations. Make sure all types are
supported with various options. */
--- a/src/gcc/testsuite/gfortran.dg/alloc_comp_auto_array_3.f90
+++ b/src/gcc/testsuite/gfortran.dg/alloc_comp_auto_array_3.f90
@@ -25,6 +25,6 @@ contains
allocate (array(1)%bigarr)
end function
end
-! { dg-final { scan-tree-dump-times "builtin_malloc" 3 "original" } }
+! { dg-final { scan-tree-dump-times "builtin_malloc" 4 "original" } }
! { dg-final { scan-tree-dump-times "builtin_free" 3 "original" } }
-! { dg-final { scan-tree-dump-times "while \\(1\\)" 4 "original" } }
+! { dg-final { scan-tree-dump-times "while \\(1\\)" 5 "original" } }
--- a/src/gcc/testsuite/gfortran.dg/alloc_comp_class_3.f03
+++ b/src/gcc/testsuite/gfortran.dg/alloc_comp_class_3.f03
@@ -45,11 +45,10 @@ contains
type(c), value :: d
end subroutine
- type(c) function c_init() ! { dg-warning "not set" }
+ type(c) function c_init()
end function
subroutine sub(d)
type(u), value :: d
end subroutine
end program test_pr58586
-
--- a/src/gcc/testsuite/gfortran.dg/alloc_comp_class_4.f03
+++ b/src/gcc/testsuite/gfortran.dg/alloc_comp_class_4.f03
@@ -51,14 +51,14 @@ contains
type(t), value :: d
end subroutine
- type(c) function c_init() ! { dg-warning "not set" }
+ type(c) function c_init()
end function
class(c) function c_init2() ! { dg-warning "not set" }
allocatable :: c_init2
end function
- type(c) function d_init(this) ! { dg-warning "not set" }
+ type(c) function d_init(this)
class(d) :: this
end function
@@ -71,7 +71,7 @@ contains
allocatable :: t_init
end function
- type(t) function static_t_init() ! { dg-warning "not set" }
+ type(t) function static_t_init()
end function
end module test_pr58586_mod
@@ -102,4 +102,3 @@ program test_pr58586
call add_c(oe%init())
deallocate(oe)
end program
-
--- a/src/gcc/testsuite/gfortran.dg/allocate_with_source_14.f03
+++ b/src/gcc/testsuite/gfortran.dg/allocate_with_source_14.f03
@@ -210,5 +210,5 @@ program main
call v%free()
deallocate(av)
end program
-! { dg-final { scan-tree-dump-times "__builtin_malloc" 22 "original" } }
+! { dg-final { scan-tree-dump-times "__builtin_malloc" 23 "original" } }
! { dg-final { scan-tree-dump-times "__builtin_free" 29 "original" } }
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gfortran.dg/associate_75.f90
@@ -0,0 +1,50 @@
+! { dg-do run }
+!
+! Test fix for PR121060.
+!
+! Contributed by Damian Rouson <damian@archaeologic.codes>
+!
+module subdomain_m
+ implicit none
+
+ type subdomain_t
+ real :: s_ = 99.
+ contains
+ generic :: operator(.laplacian.) => laplacian
+ procedure laplacian
+ end type
+
+contains
+
+ function laplacian(rhs)
+ class(subdomain_t), intent(in) :: rhs
+ type(subdomain_t) laplacian
+ laplacian%s_ = rhs%s_ + 42
+ end function
+
+end module
+
+ use subdomain_m
+ implicit none
+
+ type operands_t
+ real :: s_
+ end type
+
+ type(subdomain_t) phi
+ type(operands_t) operands
+
+ associate(laplacian_phi => .laplacian. phi) ! ICE because specific not found.
+ operands = approximates(laplacian_phi%s_)
+ end associate
+
+ if (int (operands%s_) /= 42) stop 1
+contains
+
+ function approximates(actual)
+ real actual
+ type(operands_t) approximates
+ approximates%s_ = actual - 99
+ end function
+
+end
--- a/src/gcc/testsuite/gfortran.dg/derived_constructor_comps_6.f90
+++ b/src/gcc/testsuite/gfortran.dg/derived_constructor_comps_6.f90
@@ -129,5 +129,5 @@ contains
prt_spec = name
end function new_prt_spec3
end program main
-! { dg-final { scan-tree-dump-times "__builtin_malloc" 15 "original" } }
+! { dg-final { scan-tree-dump-times "__builtin_malloc" 16 "original" } }
! { dg-final { scan-tree-dump-times "__builtin_free" 33 "original" } }
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gfortran.dg/derived_result_3.f90
@@ -0,0 +1,158 @@
+! { dg-do run }
+! PR fortran/98454 - default-initialization of derived-type function results
+
+program test
+ implicit none
+ type t
+ integer :: unit = -1
+ end type t
+ type u
+ integer, allocatable :: unit(:)
+ end type u
+ type(t) :: x, x3(3)
+ type(u) :: y, y4(4)
+
+ ! Scalar function result, DT with default initializer
+ x = t(42)
+ if (x% unit /= 42) stop 1
+ x = g()
+ if (x% unit /= -1) stop 2
+ x = t(42)
+ x = f()
+ if (x% unit /= -1) stop 3
+ x = t(42)
+ x = h()
+ if (x% unit /= -1) stop 4
+ x = t(42)
+ x = k()
+ if (x% unit /= -1) stop 5
+
+ ! Array function result, DT with default initializer
+ x3 = t(13)
+ if (any (x3% unit /= 13)) stop 11
+ x3 = f3()
+ if (any (x3% unit /= -1)) stop 12
+ x3 = t(13)
+ x3 = g3()
+ if (any (x3% unit /= -1)) stop 13
+ x3 = t(13)
+ x3 = h3()
+ if (any (x3% unit /= -1)) stop 14
+ x3 = t(13)
+ x3 = k3()
+ if (any (x3% unit /= -1)) stop 15
+
+ ! Scalar function result, DT with allocatable component
+ y = u()
+ if (allocated (y% unit)) stop 21
+ allocate (y% unit(42))
+ y = m()
+ if (allocated (y% unit)) stop 22
+ allocate (y% unit(42))
+ y = n()
+ if (allocated (y% unit)) stop 23
+ allocate (y% unit(42))
+ y = o()
+ if (allocated (y% unit)) stop 24
+ allocate (y% unit(42))
+ y = p()
+ if (allocated (y% unit)) stop 25
+
+ ! Array function result, DT with allocatable component
+ y4 = u()
+ if (allocated (y4(1)% unit)) stop 31
+ allocate (y4(1)% unit(42))
+ y4 = m4()
+ if (allocated (y4(1)% unit)) stop 32
+ y4 = u()
+ allocate (y4(1)% unit(42))
+ y4 = n4()
+ if (allocated (y4(1)% unit)) stop 33
+
+ y4 = u()
+ allocate (y4(1)% unit(42))
+ y4 = o4()
+ if (allocated (y4(1)% unit)) stop 34
+ y4 = u()
+ allocate (y4(1)% unit(42))
+ y4 = p4()
+ if (allocated (y4(1)% unit)) stop 35
+
+contains
+
+ ! Function result not referenced within function body
+ function f()
+ type(t) :: f
+ end function f
+
+ function k() result (f)
+ type(t) :: f
+ end function k
+
+ ! Function result referenced within function body
+ function g()
+ type(t) :: g
+ if (g% unit /= -1) stop 41
+ end function g
+
+ function h() result (g)
+ type(t) :: g
+ if (g% unit /= -1) stop 42
+ end function h
+
+ ! Function result not referenced within function body
+ function f3 ()
+ type(t) :: f3(3)
+ end function f3
+
+ function k3() result (f3)
+ type(t) :: f3(3)
+ end function k3
+
+ ! Function result referenced within function body
+ function g3()
+ type(t) :: g3(3)
+ if (any (g3% unit /= -1)) stop 43
+ end function g3
+
+ function h3() result (g3)
+ type(t) :: g3(3)
+ if (any (g3% unit /= -1)) stop 44
+ end function h3
+
+ function m()
+ type(u) :: m
+ end function m
+
+ function n() result (f)
+ type(u) :: f
+ end function n
+
+ function o()
+ type(u) :: o
+ if (allocated (o% unit)) stop 71
+ end function o
+
+ function p() result (f)
+ type(u) :: f
+ if (allocated (f% unit)) stop 72
+ end function p
+
+ function m4()
+ type(u) :: m4(4)
+ end function m4
+
+ function n4() result (f)
+ type(u) :: f(4)
+ end function n4
+
+ function o4()
+ type(u) :: o4(4)
+ if (allocated (o4(1)% unit)) stop 73
+ end function o4
+
+ function p4() result (f)
+ type(u) :: f(4)
+ if (allocated (f(1)% unit)) stop 74
+ end function p4
+end
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gfortran.dg/derived_result_5.f90
@@ -0,0 +1,123 @@
+! { dg-do run }
+! { dg-additional-options "-O2 -Wreturn-type" }
+!
+! PR fortran/85750 - default-initialization and functions returning derived type
+
+module bar
+ implicit none
+ type ilist
+ integer :: count = 42
+ integer, pointer :: ptr(:) => null()
+ end type ilist
+
+ type jlist
+ real, allocatable :: a(:)
+ integer :: count = 23
+ end type jlist
+
+contains
+
+ function make_list(i)
+ integer, intent(in) :: i
+ type(ilist), dimension(2) :: make_list
+ make_list(i)%count = i
+ end function make_list
+
+ function make_list_res(i) result(list)
+ integer, intent(in) :: i
+ type(ilist), dimension(2) :: list
+ list(i)%count = i
+ end function make_list_res
+
+ function make_jlist(i)
+ integer, intent(in) :: i
+ type(jlist), dimension(2) :: make_jlist
+ make_jlist(i)%count = i
+ end function make_jlist
+
+ function make_jlist_res(i) result(list)
+ integer, intent(in) :: i
+ type(jlist), dimension(2) :: list
+ list(i)%count = i
+ end function make_jlist_res
+
+ function empty_ilist()
+ type(ilist), dimension(2) :: empty_ilist
+ end function
+
+ function empty_jlist()
+ type(jlist), dimension(2) :: empty_jlist
+ end function
+
+ function empty_ilist_res() result (res)
+ type(ilist), dimension(2) :: res
+ end function
+
+ function empty_jlist_res() result (res)
+ type(jlist), dimension(2) :: res
+ end function
+
+end module bar
+
+program foo
+ use bar
+ implicit none
+ type(ilist) :: mylist(2) = ilist(count=-2)
+ type(jlist), allocatable :: yourlist(:)
+
+ mylist = ilist(count=-1)
+ if (any (mylist%count /= [-1,-1])) stop 1
+ mylist = empty_ilist()
+ if (any (mylist%count /= [42,42])) stop 2
+ mylist = ilist(count=-1)
+ mylist = empty_ilist_res()
+ if (any (mylist%count /= [42,42])) stop 3
+
+ allocate(yourlist(1:2))
+ if (any (yourlist%count /= [23,23])) stop 4
+ yourlist = jlist(count=-1)
+ if (any (yourlist%count /= [-1,-1])) stop 5
+ yourlist = empty_jlist()
+ if (any (yourlist%count /= [23,23])) stop 6
+ yourlist = jlist(count=-1)
+ yourlist = empty_jlist_res()
+ if (any (yourlist%count /= [23,23])) stop 7
+
+ mylist = make_list(1)
+ if (any (mylist%count /= [1,42])) stop 11
+ mylist = make_list(2)
+ if (any (mylist%count /= [42,2])) stop 12
+ mylist = (make_list(1))
+ if (any (mylist%count /= [1,42])) stop 13
+ mylist = [make_list(2)]
+ if (any (mylist%count /= [42,2])) stop 14
+
+ mylist = make_list_res(1)
+ if (any (mylist%count /= [1,42])) stop 21
+ mylist = make_list_res(2)
+ if (any (mylist%count /= [42,2])) stop 22
+ mylist = (make_list_res(1))
+ if (any (mylist%count /= [1,42])) stop 23
+ mylist = [make_list_res(2)]
+ if (any (mylist%count /= [42,2])) stop 24
+
+ yourlist = make_jlist(1)
+ if (any (yourlist%count /= [1,23])) stop 31
+ yourlist = make_jlist(2)
+ if (any (yourlist%count /= [23,2])) stop 32
+ yourlist = (make_jlist(1))
+ if (any (yourlist%count /= [1,23])) stop 33
+ yourlist = [make_jlist(2)]
+ if (any (yourlist%count /= [23,2])) stop 34
+
+ yourlist = make_jlist_res(1)
+ if (any (yourlist%count /= [1,23])) stop 41
+ yourlist = make_jlist_res(2)
+ if (any (yourlist%count /= [23,2])) stop 42
+ yourlist = (make_jlist_res(1))
+ if (any (yourlist%count /= [1,23])) stop 43
+ yourlist = [make_jlist_res(2)]
+ if (any (yourlist%count /= [23,2])) stop 44
+
+ deallocate (yourlist)
+end program foo
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gfortran.dg/interface_63.f90
@@ -0,0 +1,97 @@
+! { dg-do compile }
+! PR fortran/120784 - fix checking of renamed-on-use interface name
+!
+! Contributed by Matt Thompson <matthew.thompson at nasa dot gov>
+
+module A_mod
+ implicit none
+
+ interface Get
+ procedure :: get_1
+ procedure :: get_2
+ end interface Get
+
+contains
+
+ subroutine get_1(i)
+ integer :: i
+ i = 5
+ end subroutine get_1
+
+ subroutine get_2(x)
+ real :: x
+ x = 4
+ end subroutine get_2
+end module A_mod
+
+module B_mod
+ use A_mod, only : MyGet => Get
+ implicit none
+
+ interface MyGet
+ procedure :: other_get
+ end interface MyGet
+
+contains
+
+ subroutine other_get(c)
+ character(1) :: c
+ c = 'a'
+ end subroutine other_get
+
+ subroutine check_get ()
+ character :: c
+ integer :: i
+ real :: r
+ call myget (c)
+ call myget (i)
+ call myget (r)
+ end subroutine check_get
+
+end module B_MOD
+
+program p
+ use b_mod, only: myget
+ implicit none
+ character :: c
+ integer :: i
+ real :: r
+ call myget (c)
+ call myget (i)
+ call myget (r)
+end
+
+! Check that we do not regress on the following:
+
+module mod1
+ implicit none
+
+ interface local
+ module procedure local_data
+ end interface local
+
+contains
+
+ logical function local_data (data) result (local)
+ real, intent(in) :: data
+ local = .true.
+ end function local_data
+
+end module mod1
+
+module mod2
+ use mod1, only: local
+ implicit none
+
+ interface local
+ module procedure local_invt
+ end interface local
+
+contains
+
+ logical function local_invt (invt) result (local)
+ integer, intent(in) :: invt
+ local = .true.
+ end function local_invt
+
+end module mod2
--- a/src/gcc/testsuite/gfortran.dg/pdt_26.f03
+++ b/src/gcc/testsuite/gfortran.dg/pdt_26.f03
@@ -43,4 +43,4 @@ program test_pdt
if (any (c(1)%foo .ne. [13,15,17])) STOP 2
end program test_pdt
! { dg-final { scan-tree-dump-times "__builtin_free" 8 "original" } }
-! { dg-final { scan-tree-dump-times "__builtin_malloc" 8 "original" } }
+! { dg-final { scan-tree-dump-times "__builtin_malloc" 9 "original" } }
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gfortran.dg/pointer_check_15.f90
@@ -0,0 +1,46 @@
+! { dg-do run }
+! { dg-additional-options "-O -fcheck=pointer -fdump-tree-original" }
+!
+! PR fortran/121145
+! Erroneous runtime error: Proc-pointer actual argument 'ptr' is not associated
+!
+! Contributed by Federico Perini.
+
+module m
+ implicit none
+
+ abstract interface
+ subroutine fun(x)
+ real, intent(in) :: x
+ end subroutine fun
+ end interface
+
+contains
+
+ subroutine with_fun(sub)
+ procedure(fun), optional :: sub
+ if (present(sub)) stop 1
+ end subroutine
+
+ subroutine with_non_optional(sub)
+ procedure(fun) :: sub
+ end subroutine
+
+end module m
+
+program p
+ use m
+ implicit none
+
+ procedure(fun), pointer :: ptr1 => null()
+ procedure(fun), pointer :: ptr2 => null()
+
+ call with_fun()
+ call with_fun(sub=ptr1) ! no runtime check here
+
+ if (associated (ptr2)) then
+ call with_non_optional(sub=ptr2) ! runtime check here
+ end if
+end
+
+! { dg-final { scan-tree-dump-times "Proc-pointer actual argument .'ptr2.'" 1 "original" } }
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gnat.dg/specs/opt7.ads
@@ -0,0 +1,15 @@
+-- { dg-do compile }
+-- { dg-options "-O2 -gnatn" }
+
+with Opt7_Pkg; use Opt7_Pkg;
+
+package Opt7 is
+
+ type Rec is record
+ E : Enum;
+ end record;
+
+ function Image (R : Rec) return String is
+ (if R.E = A then Image (R.E) else "");
+
+end Opt7;
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gnat.dg/specs/opt7_pkg.adb
@@ -0,0 +1,15 @@
+package body Opt7_Pkg is
+
+ type Constant_String_Access is access constant String;
+
+ type Enum_Name is array (Enum) of Constant_String_Access;
+
+ Enum_Name_Table : constant Enum_Name :=
+ (A => new String'("A"), B => new String'("B"));
+
+ function Image (E : Enum) return String is
+ begin
+ return Enum_Name_Table (E).all;
+ end Image;
+
+end Opt7_Pkg;
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gnat.dg/specs/opt7_pkg.ads
@@ -0,0 +1,9 @@
+-- { dg-excess-errors "no code generated" }
+
+package Opt7_Pkg is
+
+ type Enum is (A, B);
+
+ function Image (E : Enum) return String with Inline;
+
+end Opt7_Pkg;
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gnat.dg/sso20.adb
@@ -0,0 +1,29 @@
+-- { dg-do run }
+-- { dg-options "-O" }
+
+with Ada.Unchecked_Conversion;
+with Interfaces; use Interfaces;
+with System; use System;
+
+procedure SSO20 is
+
+ type Bytes_Ref is array (1 .. 4) of Unsigned_8
+ with Convention => Ada_Pass_By_Reference;
+
+ type U32_BE is record
+ Value : Unsigned_32;
+ end record
+ with
+ Pack,
+ Bit_Order => High_Order_First,
+ Scalar_Storage_Order => High_Order_First;
+
+ function Conv is new Ada.Unchecked_Conversion (Bytes_Ref, U32_BE);
+
+ function Value (B : Bytes_Ref) return Unsigned_32 is (Conv (B).Value);
+
+begin
+ if Value ((16#11#, 16#22#, 16#33#, 16#44#)) /= 16#11223344# then
+ raise Program_Error;
+ end if;
+end;
--- a/src/gcc/testsuite/lib/multiline.exp
+++ b/src/gcc/testsuite/lib/multiline.exp
@@ -153,6 +153,9 @@ proc handle-multiline-outputs { text } {
# If dg-enable-nn-line-numbers was provided, then obscure source-margin
# line numbers by converting them to "NN" form.
set text [maybe-handle-nn-line-numbers $text]
+
+ # Remove Windows .exe suffix
+ regsub -all "(as|cc1|cc1plus|collect2|f951|ld|lto-wrapper)\.exe?:" $text {\1:} text
set index 0
foreach entry $multiline_expected_outputs {
--- a/src/gcc/testsuite/lib/target-supports.exp
+++ b/src/gcc/testsuite/lib/target-supports.exp
@@ -5388,6 +5388,13 @@ proc add_options_for_aarch64_sve { flags } {
return "$flags -march=armv8.2-a+sve"
}
+proc add_options_for_aarch64_sme { flags } {
+ if { ![istarget aarch64*-*-*] || [check_effective_target_aarch64_sme] } {
+ return "$flags"
+ }
+ return "$flags -march=armv9-a+sme"
+}
+
# Return 1 if this is an ARM target supporting the FP16 alternative
# format. Some multilibs may be incompatible with the options needed. Also
# set et_arm_fp16_alternative_flags to the best options to add.
@@ -6037,6 +6044,22 @@ foreach N { 128 256 512 1024 2048 } {
}]
}
+# Return true if this is an AArch64 target that can run SME code.
+
+proc check_effective_target_aarch64_sme_hw { } {
+ if { ![istarget aarch64*-*-*] } {
+ return 0
+ }
+ return [check_runtime aarch64_sme_hw_available {
+ int
+ main (void)
+ {
+ asm volatile ("rdsvl x0, #1");
+ return 0;
+ }
+ } [add_options_for_aarch64_sme ""]]
+}
+
proc check_effective_target_arm_neonv2_hw { } {
return [check_runtime arm_neon_hwv2_available {
#include "arm_neon.h"
--- a/src/gcc/tree-chrec.cc
+++ b/src/gcc/tree-chrec.cc
@@ -1490,7 +1490,7 @@ convert_affine_scev (class loop *loop, tree type,
new_step = *step;
if (TYPE_PRECISION (step_type) > TYPE_PRECISION (ct) && TYPE_UNSIGNED (ct))
{
- tree signed_ct = build_nonstandard_integer_type (TYPE_PRECISION (ct), 0);
+ tree signed_ct = signed_type_for (ct);
new_step = chrec_convert (signed_ct, new_step, at_stmt,
use_overflow_semantics);
}
--- a/src/gcc/tree-sra.cc
+++ b/src/gcc/tree-sra.cc
@@ -2480,6 +2480,12 @@ sort_and_splice_var_accesses (tree var)
}
unscalarizable_region = true;
}
+ /* If there the same place is accessed with two incompatible
+ aggregate types, trying to base total scalarization on either of
+ them can be wrong. */
+ if (!first_scalar && !types_compatible_p (access->type, ac2->type))
+ bitmap_set_bit (cannot_scalarize_away_bitmap,
+ DECL_UID (access->base));
if (grp_same_access_path
&& (!ac2->grp_same_access_path
@@ -2865,7 +2871,10 @@ analyze_access_subtree (struct access *root, struct access *parent,
for (child = root->first_child; child; child = child->next_sibling)
{
- hole |= covered_to < child->offset;
+ if (totally)
+ covered_to = child->offset;
+ else
+ hole |= covered_to < child->offset;
sth_created |= analyze_access_subtree (child, root,
allow_replacements && !scalar
&& !root->grp_partial_lhs,
@@ -2876,6 +2885,8 @@ analyze_access_subtree (struct access *root, struct access *parent,
covered_to += child->size;
else
hole = true;
+ if (totally && !hole)
+ covered_to = limit;
}
if (allow_replacements && scalar && !root->first_child
@@ -2948,7 +2959,7 @@ analyze_access_subtree (struct access *root, struct access *parent,
root->grp_total_scalarization = 0;
}
- if (!hole || totally)
+ if (!hole)
root->grp_covered = 1;
else if (root->grp_write || comes_initialized_p (root->base))
root->grp_unscalarized_data = 1; /* not covered and written to */
--- a/src/gcc/tree-ssa-math-opts.cc
+++ b/src/gcc/tree-ssa-math-opts.cc
@@ -1052,6 +1052,7 @@ pass_cse_reciprocals::execute (function *fun)
continue;
gimple_replace_ssa_lhs (call, arg1);
+ reset_flow_sensitive_info (arg1);
if (gimple_call_internal_p (call) != (ifn != IFN_LAST))
{
auto_vec<tree, 4> args;
--- a/src/gcc/tree-ssa-sccvn.cc
+++ b/src/gcc/tree-ssa-sccvn.cc
@@ -1592,6 +1592,8 @@ fully_constant_vn_reference_p (vn_reference_t ref)
++i;
break;
}
+ if (operands[i].reverse)
+ return NULL_TREE;
if (known_eq (operands[i].off, -1))
return NULL_TREE;
off += operands[i].off;
--- a/src/gcc/tree-vect-data-refs.cc
+++ b/src/gcc/tree-vect-data-refs.cc
@@ -7058,7 +7058,8 @@ vect_can_force_dr_alignment_p (const_tree decl, poly_uint64 alignment)
return false;
if (decl_in_symtab_p (decl)
- && !symtab_node::get (decl)->can_increase_alignment_p ())
+ && (!symtab_node::get (decl)
+ || !symtab_node::get (decl)->can_increase_alignment_p ()))
return false;
if (TREE_STATIC (decl))
--- a/src/gcc/tree-vect-stmts.cc
+++ b/src/gcc/tree-vect-stmts.cc
@@ -3945,6 +3945,8 @@ vectorizable_simd_clone_call (vec_info *vinfo, stmt_vec_info stmt_info,
vec<tree>& simd_clone_info = (slp_node ? SLP_TREE_SIMD_CLONE_INFO (slp_node)
: STMT_VINFO_SIMD_CLONE_INFO (stmt_info));
+ if (!vec_stmt)
+ simd_clone_info.truncate (0);
arginfo.reserve (nargs, true);
auto_vec<slp_tree> slp_op;
slp_op.safe_grow_cleared (nargs);
@@ -3993,10 +3995,10 @@ vectorizable_simd_clone_call (vec_info *vinfo, stmt_vec_info stmt_info,
/* For linear arguments, the analyze phase should have saved
the base and step in {STMT_VINFO,SLP_TREE}_SIMD_CLONE_INFO. */
- if (i * 3 + 4 <= simd_clone_info.length ()
+ if (vec_stmt
+ && i * 3 + 4 <= simd_clone_info.length ()
&& simd_clone_info[i * 3 + 2])
{
- gcc_assert (vec_stmt);
thisarginfo.linear_step = tree_to_shwi (simd_clone_info[i * 3 + 2]);
thisarginfo.op = simd_clone_info[i * 3 + 1];
thisarginfo.simd_lane_linear
@@ -4051,7 +4053,7 @@ vectorizable_simd_clone_call (vec_info *vinfo, stmt_vec_info stmt_info,
unsigned group_size = slp_node ? SLP_TREE_LANES (slp_node) : 1;
unsigned int badness = 0;
struct cgraph_node *bestn = NULL;
- if (simd_clone_info.exists ())
+ if (vec_stmt)
bestn = cgraph_node::get (simd_clone_info[0]);
else
for (struct cgraph_node *n = node->simd_clones; n != NULL;
@@ -14261,6 +14263,8 @@ supportable_widening_operation (vec_info *vinfo,
internal_fn lo, hi, even, odd;
lookup_hilo_internal_fn (ifn, &lo, &hi);
+ if (BYTES_BIG_ENDIAN)
+ std::swap (lo, hi);
*code1 = as_combined_fn (lo);
*code2 = as_combined_fn (hi);
optab1 = direct_internal_fn_optab (lo, {vectype, vectype});
--- a/src/libgcc/ChangeLog
+++ b/src/libgcc/ChangeLog
@@ -1,3 +1,13 @@
+2025-08-15 Richard Sandiford <richard.sandiford@arm.com>
+
+ Backported from master:
+ 2025-07-17 Richard Sandiford <richard.sandiford@arm.com>
+ Yury Khrustalev <yury.khrustalev@arm.com>
+
+ * config/aarch64/linux-unwind.h (aarch64_fallback_frame_state):
+ If a signal was raised while there was an uncommitted lazy save,
+ commit the save as part of the unwind process.
+
2025-05-23 Release Manager
* GCC 14.3.0 released.
--- a/src/libgcc/config/aarch64/linux-unwind.h
+++ b/src/libgcc/config/aarch64/linux-unwind.h
@@ -27,7 +27,7 @@
#include <signal.h>
#include <sys/ucontext.h>
-
+#include <stdint.h>
/* Since insns are always stored LE, on a BE system the opcodes will
be loaded byte-reversed. Therefore, define two sets of opcodes,
@@ -43,6 +43,22 @@
#define MD_FALLBACK_FRAME_STATE_FOR aarch64_fallback_frame_state
+#ifndef FPSIMD_MAGIC
+#define FPSIMD_MAGIC 0x46508001
+#endif
+
+#ifndef TPIDR2_MAGIC
+#define TPIDR2_MAGIC 0x54504902
+#endif
+
+#ifndef ZA_MAGIC
+#define ZA_MAGIC 0x54366345
+#endif
+
+#ifndef EXTRA_MAGIC
+#define EXTRA_MAGIC 0x45585401
+#endif
+
static _Unwind_Reason_Code
aarch64_fallback_frame_state (struct _Unwind_Context *context,
_Unwind_FrameState * fs)
@@ -58,6 +74,21 @@ aarch64_fallback_frame_state (struct _Unwind_Context *context,
ucontext_t uc;
};
+ struct tpidr2_block
+ {
+ uint64_t za_save_buffer;
+ uint16_t num_za_save_slices;
+ uint8_t reserved[6];
+ };
+
+ struct za_block
+ {
+ struct _aarch64_ctx head;
+ uint16_t vl;
+ uint16_t reserved[3];
+ uint64_t data;
+ };
+
struct rt_sigframe *rt_;
_Unwind_Ptr new_cfa;
unsigned *pc = context->ra;
@@ -103,11 +134,15 @@ aarch64_fallback_frame_state (struct _Unwind_Context *context,
field can be used to skip over unrecognized context extensions.
The end of the context sequence is marked by a context with magic
0 or size 0. */
+ struct tpidr2_block *tpidr2 = 0;
+ struct za_block *za_ctx = 0;
+
for (extension_marker = (struct _aarch64_ctx *) &sc->__reserved;
extension_marker->magic;
extension_marker = (struct _aarch64_ctx *)
((unsigned char *) extension_marker + extension_marker->size))
{
+ restart:
if (extension_marker->magic == FPSIMD_MAGIC)
{
struct fpsimd_context *ctx =
@@ -139,12 +174,83 @@ aarch64_fallback_frame_state (struct _Unwind_Context *context,
fs->regs.reg[AARCH64_DWARF_V0 + i].loc.offset = offset;
}
}
+ else if (extension_marker->magic == TPIDR2_MAGIC)
+ {
+ /* A TPIDR2 context.
+
+ All the casting is to support big-endian ILP32. We could read
+ directly into TPIDR2 otherwise. */
+ struct { struct _aarch64_ctx h; uint64_t tpidr2; } *ctx
+ = (void *)extension_marker;
+#if defined (__ILP32__)
+ tpidr2 = (struct tpidr2_block *) (uintptr_t) ctx->tpidr2;
+#else
+ tpidr2 = (struct tpidr2_block *) ctx->tpidr2;
+#endif
+ }
+ else if (extension_marker->magic == ZA_MAGIC)
+ /* A ZA context. We interpret this later. */
+ za_ctx = (void *)extension_marker;
+ else if (extension_marker->magic == EXTRA_MAGIC)
+ {
+ /* Extra context. The ABI guarantees that the next _aarch64_ctx
+ in the current list will be the zero terminator, so we can simply
+ switch to the new list and continue from there. The new list is
+ also zero-terminated.
+
+ As above, the casting is to support big-endian ILP32. */
+ struct { struct _aarch64_ctx h; uint64_t next; } *ctx
+ = (void *)extension_marker;
+#if defined (__ILP32__)
+ extension_marker = (struct _aarch64_ctx *) (uintptr_t) ctx->next;
+#else
+ extension_marker = (struct _aarch64_ctx *) ctx->next;
+#endif
+ goto restart;
+ }
else
{
/* There is context provided that we do not recognize! */
}
}
+ /* Signal handlers are entered with ZA in the off state (TPIDR2_ELO==0 and
+ PSTATE.ZA==0). The normal process when transitioning from ZA being
+ dormant to ZA being off is to commit the lazy save; see the AAPCS64
+ for details. However, this is not done when entering a signal handler.
+ Instead, linux saves the old contents of ZA and TPIDR2_EL0 to the
+ sigcontext without interpreting them further.
+
+ Therefore, if a signal handler throws an exception to code outside the
+ signal handler, the unwinder must commit the lazy save after the fact.
+ Committing a lazy save means:
+
+ (1) Storing the contents of ZA into the buffer provided by TPIDR2_EL0.
+ (2) Setting TPIDR2_EL0 to zero.
+ (3) Turning ZA off.
+
+ (2) and (3) have already been done by the call to __libgcc_arm_za_disable.
+ (1) involves copying data from the ZA sigcontext entry to the
+ corresponding lazy save buffer. */
+ if (tpidr2 && za_ctx && tpidr2->za_save_buffer)
+ {
+ /* There is a 16-bit vector length (measured in bytes) at ZA_CTX + 8.
+ The data itself starts at ZA_CTX + 16.
+ As above, the casting is to support big-endian ILP32. */
+ uint16_t vl = za_ctx->vl;
+#if defined (__ILP32__)
+ void *save_buffer = (void *) (uintptr_t) tpidr2->za_save_buffer;
+ const void *za_buffer = (void *) (uintptr_t) &za_ctx->data;
+#else
+ void *save_buffer = (void *) tpidr2->za_save_buffer;
+ const void *za_buffer = (void *) &za_ctx->data;
+#endif
+ uint64_t num_slices = tpidr2->num_za_save_slices;
+ if (num_slices > vl)
+ num_slices = vl;
+ memcpy (save_buffer, za_buffer, num_slices * vl);
+ }
+
fs->regs.how[31] = REG_SAVED_OFFSET;
fs->regs.reg[31].loc.offset = (_Unwind_Ptr) & (sc->sp) - new_cfa;
--- a/src/libgcc/config/avr/libf7/ChangeLog
+++ b/src/libgcc/config/avr/libf7/ChangeLog
@@ -1,3 +1,11 @@
+2025-05-27 Georg-Johann Lay <avr@gjlay.de>
+
+ Backported from master:
+ 2025-05-27 Georg-Johann Lay <avr@gjlay.de>
+
+ PR target/120441
+ * libf7.c (f7_exp): Limit aa->expo to 10 (not to 9).
+
2025-05-23 Release Manager
* GCC 14.3.0 released.
--- a/src/libgcc/config/avr/libf7/libf7.c
+++ b/src/libgcc/config/avr/libf7/libf7.c
@@ -1639,10 +1639,10 @@ void f7_exp (f7_t *cc, const f7_t *aa)
return f7_set_nan (cc);
/* The maximal exponent of 2 for a double is 1023, hence we may limit
- to |A| < 1023 * ln2 ~ 709. We limit to 1024 ~ 1.99 * 2^9 */
+ to |A| < 1023 * ln2 ~ 709. We limit to 1024 = 2^10 */
if (f7_class_inf (a_class)
- || (f7_class_nonzero (a_class) && aa->expo >= 9))
+ || (f7_class_nonzero (a_class) && aa->expo >= 10))
{
if (f7_class_sign (a_class))
return f7_clr (cc);
--- a/src/libsanitizer/ChangeLog
+++ b/src/libsanitizer/ChangeLog
@@ -1,3 +1,14 @@
+2025-07-31 Florian Weimer <fweimer@redhat.com>
+
+ Backported from master:
+ 2025-05-02 Florian Weimer <fweimer@redhat.com>
+ Tom Stellard <tstellar@redhat.com>
+
+ * sanitizer_common/sanitizer_common_interceptors_ioctl.inc: Cherry
+ picked from LLVM commit 59978b21ad9c65276ee8e14f26759691b8a65763.
+ * sanitizer_common/sanitizer_platform_limits_posix.cpp: Likewise.
+ * sanitizer_common/sanitizer_platform_limits_posix.h: Likewise.
+
2025-05-23 Release Manager
* GCC 14.3.0 released.
--- a/src/libsanitizer/sanitizer_common/sanitizer_common_interceptors_ioctl.inc
+++ b/src/libsanitizer/sanitizer_common/sanitizer_common_interceptors_ioctl.inc
@@ -338,17 +338,9 @@ static void ioctl_table_fill() {
_(SOUND_PCM_WRITE_CHANNELS, WRITE, sizeof(int));
_(SOUND_PCM_WRITE_FILTER, WRITE, sizeof(int));
_(TCFLSH, NONE, 0);
-#if SANITIZER_GLIBC
- _(TCGETA, WRITE, struct_termio_sz);
-#endif
_(TCGETS, WRITE, struct_termios_sz);
_(TCSBRK, NONE, 0);
_(TCSBRKP, NONE, 0);
-#if SANITIZER_GLIBC
- _(TCSETA, READ, struct_termio_sz);
- _(TCSETAF, READ, struct_termio_sz);
- _(TCSETAW, READ, struct_termio_sz);
-#endif
_(TCSETS, READ, struct_termios_sz);
_(TCSETSF, READ, struct_termios_sz);
_(TCSETSW, READ, struct_termios_sz);
--- a/src/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.cpp
+++ b/src/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.cpp
@@ -479,9 +479,6 @@ unsigned struct_ElfW_Phdr_sz = sizeof(Elf_Phdr);
unsigned struct_input_id_sz = sizeof(struct input_id);
unsigned struct_mtpos_sz = sizeof(struct mtpos);
unsigned struct_rtentry_sz = sizeof(struct rtentry);
-#if SANITIZER_GLIBC || SANITIZER_ANDROID
- unsigned struct_termio_sz = sizeof(struct termio);
-#endif
unsigned struct_vt_consize_sz = sizeof(struct vt_consize);
unsigned struct_vt_sizes_sz = sizeof(struct vt_sizes);
unsigned struct_vt_stat_sz = sizeof(struct vt_stat);
@@ -758,13 +755,9 @@ unsigned struct_ElfW_Phdr_sz = sizeof(Elf_Phdr);
unsigned IOCTL_SOUND_PCM_WRITE_FILTER = SOUND_PCM_WRITE_FILTER;
#endif // SOUND_VERSION
unsigned IOCTL_TCFLSH = TCFLSH;
- unsigned IOCTL_TCGETA = TCGETA;
unsigned IOCTL_TCGETS = TCGETS;
unsigned IOCTL_TCSBRK = TCSBRK;
unsigned IOCTL_TCSBRKP = TCSBRKP;
- unsigned IOCTL_TCSETA = TCSETA;
- unsigned IOCTL_TCSETAF = TCSETAF;
- unsigned IOCTL_TCSETAW = TCSETAW;
unsigned IOCTL_TCSETS = TCSETS;
unsigned IOCTL_TCSETSF = TCSETSF;
unsigned IOCTL_TCSETSW = TCSETSW;
--- a/src/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.h
+++ b/src/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.h
@@ -1012,7 +1012,6 @@ extern unsigned struct_hd_geometry_sz;
extern unsigned struct_input_absinfo_sz;
extern unsigned struct_input_id_sz;
extern unsigned struct_mtpos_sz;
-extern unsigned struct_termio_sz;
extern unsigned struct_vt_consize_sz;
extern unsigned struct_vt_sizes_sz;
extern unsigned struct_vt_stat_sz;
@@ -1257,13 +1256,9 @@ extern unsigned IOCTL_SNDCTL_COPR_SENDMSG;
extern unsigned IOCTL_SNDCTL_COPR_WCODE;
extern unsigned IOCTL_SNDCTL_COPR_WDATA;
extern unsigned IOCTL_TCFLSH;
-extern unsigned IOCTL_TCGETA;
extern unsigned IOCTL_TCGETS;
extern unsigned IOCTL_TCSBRK;
extern unsigned IOCTL_TCSBRKP;
-extern unsigned IOCTL_TCSETA;
-extern unsigned IOCTL_TCSETAF;
-extern unsigned IOCTL_TCSETAW;
extern unsigned IOCTL_TCSETS;
extern unsigned IOCTL_TCSETSF;
extern unsigned IOCTL_TCSETSW;
--- a/src/libstdc++-v3/ChangeLog
+++ b/src/libstdc++-v3/ChangeLog
@@ -1,3 +1,62 @@
+2025-06-11 Jonathan Wakely <jwakely@redhat.com>
+
+ Backported from master:
+ 2025-06-05 Jonathan Wakely <jwakely@redhat.com>
+
+ PR libstdc++/120548
+ * include/std/format (__formatter_fp::_M_localize): Do not
+ include a leading sign character in the string to be grouped.
+ * testsuite/std/format/functions/format.cc: Check grouping when
+ sign is present in the output.
+
+2025-06-11 Jonathan Wakely <jwakely@redhat.com>
+
+ Backported from master:
+ 2024-09-14 Jonathan Wakely <jwakely@redhat.com>
+
+ * include/std/format (__formatter_fp::_M_localize): Add comments
+ and micro-optimize string copy.
+
+2025-06-11 Jonathan Wakely <jwakely@redhat.com>
+
+ Backported from master:
+ 2025-06-04 Jonathan Wakely <jwakely@redhat.com>
+
+ PR libstdc++/99832
+ * include/bits/chrono.h (system_clock::to_time_t): Add
+ always_inline attribute to be agnostic to the underlying type of
+ time_t.
+ (system_clock::from_time_t): Add always_inline for consistency
+ with to_time_t.
+ * testsuite/20_util/system_clock/99832.cc: New test.
+
+2025-06-10 Jonathan Wakely <jwakely@redhat.com>
+
+ Backported from master:
+ 2025-05-20 Jonathan Wakely <jwakely@redhat.com>
+
+ * doc/xml/faq.xml: Update URL for archived SGI STL docs.
+ * doc/xml/manual/containers.xml: Likewise.
+ * doc/xml/manual/extensions.xml: Likewise.
+ * doc/xml/manual/using.xml: Likewise.
+ * doc/xml/manual/utilities.xml: Likewise.
+ * doc/html/*: Regenerate.
+
+2025-06-05 Giuseppe D'Angelo <giuseppe.dangelo@kdab.com>
+
+ Backported from master:
+ 2025-03-14 Giuseppe D'Angelo <giuseppe.dangelo@kdab.com>
+
+ * include/bits/shared_ptr_base.h (lock): Fixed a compile error
+ when calling lock() on a weak_ptr<T[]>, by removing an
+ erroneous usage of element_type from within lock().
+ * testsuite/20_util/shared_ptr/requirements/explicit_instantiation/1.cc:
+ Add more tests for array types.
+ * testsuite/20_util/weak_ptr/requirements/explicit_instantiation/1.cc:
+ Likewise.
+ * testsuite/20_util/shared_ptr/requirements/1.cc: New test.
+ * testsuite/20_util/weak_ptr/requirements/1.cc: New test.
+
2025-05-23 Release Manager
* GCC 14.3.0 released.
--- a/src/libstdc++-v3/doc/html/faq.html
+++ b/src/libstdc++-v3/doc/html/faq.html
@@ -796,7 +796,7 @@
Libstdc++-v3 incorporates a lot of code from
<a class="link" href="https://web.archive.org/web/20171225062613/http://www.sgi.com/tech/stl/" target="_top">the SGI STL</a>
(the final merge was from
- <a class="link" href="https://web.archive.org/web/20171225062613/http://www.sgi.com/tech/stl/whats_new.html" target="_top">release 3.3</a>).
+ <a class="link" href="https://web.archive.org/web/20171206110416/http://www.sgi.com/tech/stl/whats_new.html" target="_top">release 3.3</a>).
The code in libstdc++ contains many fixes and changes compared to the
original SGI code.
</p><p>
--- a/src/libstdc++-v3/doc/html/manual/containers.html
+++ b/src/libstdc++-v3/doc/html/manual/containers.html
@@ -11,7 +11,7 @@
Yes it is, at least using the <a class="link" href="using_dual_abi.html" title="Dual ABI">old
ABI</a>, and that's okay. This is a decision that we preserved
when we imported SGI's STL implementation. The following is
- quoted from <a class="link" href="https://web.archive.org/web/20171225062613/http://www.sgi.com/tech/stl/FAQ.html" target="_top">their FAQ</a>:
+ quoted from <a class="link" href="https://web.archive.org/web/20161222192301/http://www.sgi.com/tech/stl/FAQ.html" target="_top">their FAQ</a>:
</p><div class="blockquote"><blockquote class="blockquote"><p>
The size() member function, for list and slist, takes time
proportional to the number of elements in the list. This was a
--- a/src/libstdc++-v3/doc/html/manual/ext_numerics.html
+++ b/src/libstdc++-v3/doc/html/manual/ext_numerics.html
@@ -14,7 +14,7 @@
The operation functor must be associative.
</p><p>The <code class="code">iota</code> function wins the award for Extension With the
Coolest Name (the name comes from Ken Iverson's APL language.) As
- described in the <a class="link" href="https://web.archive.org/web/20171225062613/http://www.sgi.com/tech/stl/iota.html" target="_top">SGI
+ described in the <a class="link" href="https://web.archive.org/web/20170201044840/http://www.sgi.com/tech/stl/iota.html" target="_top">SGI
documentation</a>, it "assigns sequentially increasing values to a range.
That is, it assigns <code class="code">value</code> to <code class="code">*first</code>,
<code class="code">value + 1</code> to<code class="code"> *(first + 1)</code> and so on."
--- a/src/libstdc++-v3/doc/html/manual/ext_sgi.html
+++ b/src/libstdc++-v3/doc/html/manual/ext_sgi.html
@@ -28,12 +28,12 @@
and sets.
</p><p>Each of the associative containers map, multimap, set, and multiset
have a counterpart which uses a
- <a class="link" href="https://web.archive.org/web/20171225062613/http://www.sgi.com/tech/stl/HashFunction.html" target="_top">hashing
+ <a class="link" href="https://web.archive.org/web/20171230172024/http://www.sgi.com/tech/stl/HashFunction.html" target="_top">hashing
function</a> to do the arranging, instead of a strict weak ordering
function. The classes take as one of their template parameters a
function object that will return the hash value; by default, an
instantiation of
- <a class="link" href="https://web.archive.org/web/20171225062613/http://www.sgi.com/tech/stl/hash.html" target="_top">hash</a>.
+ <a class="link" href="https://web.archive.org/web/20171230172200/http://www.sgi.com/tech/stl/hash.html" target="_top">hash</a>.
You should specialize this functor for your class, or define your own,
before trying to use one of the hashing classes.
</p><p>The hashing classes support all the usual associative container
--- a/src/libstdc++-v3/doc/html/manual/using_concurrency.html
+++ b/src/libstdc++-v3/doc/html/manual/using_concurrency.html
@@ -40,7 +40,7 @@ The standard places requirements on the library to ensure that no data
races are caused by the library itself or by programs which use the
library correctly (as described below).
The C++11 memory model and library requirements are a more formal version
-of the <a class="link" href="https://web.archive.org/web/20171225062613/http://www.sgi.com/tech/stl/thread_safety.html" target="_top">SGI STL</a> definition of thread safety, which the library used
+of the <a class="link" href="https://web.archive.org/web/20171221154911/http://www.sgi.com/tech/stl/thread_safety.html" target="_top">SGI STL</a> definition of thread safety, which the library used
prior to the 2011 standard.
</p><p>The library strives to be thread-safe when all of the following
conditions are met:
@@ -243,10 +243,10 @@ gcc version 4.1.2 20070925 (Red Hat 4.1.2-33)
threaded and non-threaded code), see Chapter 17.
</p><p>Two excellent pages to read when working with the Standard C++
containers and threads are
- <a class="link" href="https://web.archive.org/web/20171225062613/http://www.sgi.com/tech/stl/thread_safety.html" target="_top">SGI's
- https://web.archive.org/web/20171225062613/http://www.sgi.com/tech/stl/thread_safety.html</a> and
- <a class="link" href="https://web.archive.org/web/20171225062613/http://www.sgi.com/tech/stl/Allocators.html" target="_top">SGI's
- https://web.archive.org/web/20171225062613/http://www.sgi.com/tech/stl/Allocators.html</a>.
+ <a class="link" href="https://web.archive.org/web/20171221154911/http://www.sgi.com/tech/stl/thread_safety.html" target="_top">SGI's
+ https://web.archive.org/web/20171221154911/http://www.sgi.com/tech/stl/thread_safety.html</a> and
+ <a class="link" href="https://web.archive.org/web/20171108142526/http://www.sgi.com/tech/stl/Allocators.html" target="_top">SGI's
+ https://web.archive.org/web/20171108142526/http://www.sgi.com/tech/stl/Allocators.html</a>.
</p><p><span class="emphasis"><em>However, please ignore all discussions about the user-level
configuration of the lock implementation inside the STL
container-memory allocator on those pages. For the sake of this
--- a/src/libstdc++-v3/doc/html/manual/utilities.html
+++ b/src/libstdc++-v3/doc/html/manual/utilities.html
@@ -11,6 +11,6 @@
get slightly the wrong idea. In the interest of not reinventing
the wheel, we will refer you to the introduction to the functor
concept written by SGI as part of their STL, in
- <a class="link" href="https://web.archive.org/web/20171225062613/http://www.sgi.com/tech/stl/functors.html" target="_top">their
- https://web.archive.org/web/20171225062613/http://www.sgi.com/tech/stl/functors.html</a>.
+ <a class="link" href="https://web.archive.org/web/20171209002754/http://www.sgi.com/tech/stl/functors.html" target="_top">their
+ https://web.archive.org/web/20171209002754/http://www.sgi.com/tech/stl/functors.html</a>.
</p></div></div><div class="navfooter"><hr /><table width="100%" summary="Navigation footer"><tr><td width="40%" align="left"><a accesskey="p" href="concept_checking.html">Prev</a> </td><td width="20%" align="center"><a accesskey="u" href="std_contents.html">Up</a></td><td width="40%" align="right"> <a accesskey="n" href="pairs.html">Next</a></td></tr><tr><td width="40%" align="left" valign="top">Concept Checking </td><td width="20%" align="center"><a accesskey="h" href="../index.html">Home</a></td><td width="40%" align="right" valign="top"> Pairs</td></tr></table></div></body></html>
\ No newline at end of file
--- a/src/libstdc++-v3/doc/xml/faq.xml
+++ b/src/libstdc++-v3/doc/xml/faq.xml
@@ -1130,7 +1130,7 @@
Libstdc++-v3 incorporates a lot of code from
<link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="https://web.archive.org/web/20171225062613/http://www.sgi.com/tech/stl/">the SGI STL</link>
(the final merge was from
- <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="https://web.archive.org/web/20171225062613/http://www.sgi.com/tech/stl/whats_new.html">release 3.3</link>).
+ <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="https://web.archive.org/web/20171206110416/http://www.sgi.com/tech/stl/whats_new.html">release 3.3</link>).
The code in libstdc++ contains many fixes and changes compared to the
original SGI code.
</para>
--- a/src/libstdc++-v3/doc/xml/manual/containers.xml
+++ b/src/libstdc++-v3/doc/xml/manual/containers.xml
@@ -28,7 +28,7 @@
Yes it is, at least using the <link linkend="manual.intro.using.abi">old
ABI</link>, and that's okay. This is a decision that we preserved
when we imported SGI's STL implementation. The following is
- quoted from <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="https://web.archive.org/web/20171225062613/http://www.sgi.com/tech/stl/FAQ.html">their FAQ</link>:
+ quoted from <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="https://web.archive.org/web/20161222192301/http://www.sgi.com/tech/stl/FAQ.html">their FAQ</link>:
</para>
<blockquote>
<para>
--- a/src/libstdc++-v3/doc/xml/manual/extensions.xml
+++ b/src/libstdc++-v3/doc/xml/manual/extensions.xml
@@ -227,12 +227,12 @@ extensions, be aware of two things:
</para>
<para>Each of the associative containers map, multimap, set, and multiset
have a counterpart which uses a
- <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="https://web.archive.org/web/20171225062613/http://www.sgi.com/tech/stl/HashFunction.html">hashing
+ <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="https://web.archive.org/web/20171230172024/http://www.sgi.com/tech/stl/HashFunction.html">hashing
function</link> to do the arranging, instead of a strict weak ordering
function. The classes take as one of their template parameters a
function object that will return the hash value; by default, an
instantiation of
- <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="https://web.archive.org/web/20171225062613/http://www.sgi.com/tech/stl/hash.html">hash</link>.
+ <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="https://web.archive.org/web/20171230172200/http://www.sgi.com/tech/stl/hash.html">hash</link>.
You should specialize this functor for your class, or define your own,
before trying to use one of the hashing classes.
</para>
@@ -394,7 +394,7 @@ get_temporary_buffer(5, (int*)0);
</para>
<para>The <code>iota</code> function wins the award for Extension With the
Coolest Name (the name comes from Ken Iverson's APL language.) As
- described in the <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="https://web.archive.org/web/20171225062613/http://www.sgi.com/tech/stl/iota.html">SGI
+ described in the <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="https://web.archive.org/web/20170201044840/http://www.sgi.com/tech/stl/iota.html">SGI
documentation</link>, it "assigns sequentially increasing values to a range.
That is, it assigns <code>value</code> to <code>*first</code>,
<code>value + 1</code> to<code> *(first + 1)</code> and so on."
--- a/src/libstdc++-v3/doc/xml/manual/using.xml
+++ b/src/libstdc++-v3/doc/xml/manual/using.xml
@@ -1929,7 +1929,7 @@ The standard places requirements on the library to ensure that no data
races are caused by the library itself or by programs which use the
library correctly (as described below).
The C++11 memory model and library requirements are a more formal version
-of the <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="https://web.archive.org/web/20171225062613/http://www.sgi.com/tech/stl/thread_safety.html">SGI STL</link> definition of thread safety, which the library used
+of the <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="https://web.archive.org/web/20171221154911/http://www.sgi.com/tech/stl/thread_safety.html">SGI STL</link> definition of thread safety, which the library used
prior to the 2011 standard.
</para>
@@ -2214,10 +2214,10 @@ gcc version 4.1.2 20070925 (Red Hat 4.1.2-33)
</para>
<para>Two excellent pages to read when working with the Standard C++
containers and threads are
- <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="https://web.archive.org/web/20171225062613/http://www.sgi.com/tech/stl/thread_safety.html">SGI's
- https://web.archive.org/web/20171225062613/http://www.sgi.com/tech/stl/thread_safety.html</link> and
- <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="https://web.archive.org/web/20171225062613/http://www.sgi.com/tech/stl/Allocators.html">SGI's
- https://web.archive.org/web/20171225062613/http://www.sgi.com/tech/stl/Allocators.html</link>.
+ <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="https://web.archive.org/web/20171221154911/http://www.sgi.com/tech/stl/thread_safety.html">SGI's
+ https://web.archive.org/web/20171221154911/http://www.sgi.com/tech/stl/thread_safety.html</link> and
+ <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="https://web.archive.org/web/20171108142526/http://www.sgi.com/tech/stl/Allocators.html">SGI's
+ https://web.archive.org/web/20171108142526/http://www.sgi.com/tech/stl/Allocators.html</link>.
</para>
<para><emphasis>However, please ignore all discussions about the user-level
configuration of the lock implementation inside the STL
--- a/src/libstdc++-v3/doc/xml/manual/utilities.xml
+++ b/src/libstdc++-v3/doc/xml/manual/utilities.xml
@@ -22,8 +22,8 @@
get slightly the wrong idea. In the interest of not reinventing
the wheel, we will refer you to the introduction to the functor
concept written by SGI as part of their STL, in
- <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="https://web.archive.org/web/20171225062613/http://www.sgi.com/tech/stl/functors.html">their
- https://web.archive.org/web/20171225062613/http://www.sgi.com/tech/stl/functors.html</link>.
+ <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="https://web.archive.org/web/20171209002754/http://www.sgi.com/tech/stl/functors.html">their
+ https://web.archive.org/web/20171209002754/http://www.sgi.com/tech/stl/functors.html</link>.
</para>
</section>
--- a/src/libstdc++-v3/include/bits/chrono.h
+++ b/src/libstdc++-v3/include/bits/chrono.h
@@ -1239,6 +1239,7 @@ _GLIBCXX_BEGIN_INLINE_ABI_NAMESPACE(_V2)
now() noexcept;
// Map to C API
+ [[__gnu__::__always_inline__]]
static std::time_t
to_time_t(const time_point& __t) noexcept
{
@@ -1246,6 +1247,7 @@ _GLIBCXX_BEGIN_INLINE_ABI_NAMESPACE(_V2)
(__t.time_since_epoch()).count());
}
+ [[__gnu__::__always_inline__]]
static time_point
from_time_t(std::time_t __t) noexcept
{
--- a/src/libstdc++-v3/include/bits/shared_ptr_base.h
+++ b/src/libstdc++-v3/include/bits/shared_ptr_base.h
@@ -2069,7 +2069,7 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
__shared_ptr<_Tp, _Lp>
lock() const noexcept
- { return __shared_ptr<element_type, _Lp>(*this, std::nothrow); }
+ { return __shared_ptr<_Tp, _Lp>(*this, std::nothrow); }
long
use_count() const noexcept
--- a/src/libstdc++-v3/include/std/format
+++ b/src/libstdc++-v3/include/std/format
@@ -1831,25 +1831,35 @@ namespace __format
if (__grp.empty() && __point == __dot)
return __lstr; // Locale uses '.' and no grouping.
- size_t __d = __str.find(__dot);
- size_t __e = min(__d, __str.find(__exp));
+ size_t __d = __str.find(__dot); // Index of radix character (if any).
+ size_t __e = min(__d, __str.find(__exp)); // First of radix or exponent
if (__e == __str.npos)
__e = __str.size();
- const size_t __r = __str.size() - __e;
+ const size_t __r = __str.size() - __e; // Length of remainder.
auto __overwrite = [&](_CharT* __p, size_t) {
- auto __end = std::__add_grouping(__p, __np.thousands_sep(),
+ // Apply grouping to the digits before the radix or exponent.
+ int __off = 0;
+ if (auto __c = __str.front(); __c == '-' || __c == '+' || __c == ' ')
+ {
+ *__p = __c;
+ __off = 1;
+ }
+ auto __end = std::__add_grouping(__p + __off, __np.thousands_sep(),
__grp.data(), __grp.size(),
- __str.data(), __str.data() + __e);
- if (__r)
+ __str.data() + __off,
+ __str.data() + __e);
+ if (__r) // If there's a fractional part or exponent
{
if (__d != __str.npos)
{
- *__end = __point;
+ *__end = __point; // Add the locale's radix character.
++__end;
++__e;
}
- if (__r > 1)
- __end += __str.copy(__end, __str.npos, __e);
+ const size_t __rlen = __str.size() - __e;
+ // Append fractional digits and/or exponent:
+ char_traits<_CharT>::copy(__end, __str.data() + __e, __rlen);
+ __end += __rlen;
}
return (__end - __p);
};
new file mode 100644
--- /dev/null
+++ b/src/libstdc++-v3/testsuite/20_util/shared_ptr/requirements/1.cc
@@ -0,0 +1,33 @@
+// { dg-do compile { target c++11 } }
+// { dg-require-effective-target hosted }
+
+#include <memory>
+#include <testsuite_tr1.h>
+
+using namespace __gnu_test;
+
+void
+test01()
+{
+ std::shared_ptr<ClassType> ptr;
+ std::shared_ptr<const ClassType> ptr2 = ptr;
+
+#if __cpp_lib_shared_ptr_arrays >= 201611L
+ std::shared_ptr<ClassType[10]> ptr_array;
+ std::shared_ptr<ClassType[]> ptr_array2 = ptr_array;
+ std::shared_ptr<ClassType const []> ptr_array3 = ptr_array;
+#endif
+}
+
+void
+test02()
+{
+ std::shared_ptr<IncompleteClass> ptr;
+ std::shared_ptr<const IncompleteClass> ptr2 = ptr;
+
+#if __cpp_lib_shared_ptr_arrays >= 201611L
+ std::shared_ptr<IncompleteClass[10]> ptr_array;
+ std::shared_ptr<IncompleteClass[]> ptr_array2 = ptr_array;
+ std::shared_ptr<IncompleteClass const []> ptr_array3 = ptr_array;
+#endif
+}
--- a/src/libstdc++-v3/testsuite/20_util/shared_ptr/requirements/explicit_instantiation/1.cc
+++ b/src/libstdc++-v3/testsuite/20_util/shared_ptr/requirements/explicit_instantiation/1.cc
@@ -28,3 +28,15 @@ template class std::shared_ptr<int>;
template class std::shared_ptr<void>;
template class std::shared_ptr<ClassType>;
template class std::shared_ptr<IncompleteClass>;
+
+#if __cpp_lib_shared_ptr_arrays >= 201611L
+template class std::shared_ptr<ClassType []>;
+template class std::shared_ptr<ClassType [42]>;
+template class std::shared_ptr<ClassType const []>;
+template class std::shared_ptr<ClassType const [42]>;
+
+template class std::shared_ptr<IncompleteClass []>;
+template class std::shared_ptr<IncompleteClass [42]>;
+template class std::shared_ptr<IncompleteClass const []>;
+template class std::shared_ptr<IncompleteClass const [42]>;
+#endif
new file mode 100644
--- /dev/null
+++ b/src/libstdc++-v3/testsuite/20_util/system_clock/99832.cc
@@ -0,0 +1,14 @@
+// { dg-options "-O0 -g0" }
+// { dg-do compile { target c++20 } }
+// { dg-final { scan-assembler-not "system_clock9to_time_t" } }
+
+// Bug libstdc++/99832
+// std::chrono::system_clock::to_time_t needs ABI tag for 32-bit time_t
+
+#include <chrono>
+
+std::time_t
+test_pr99832(std::chrono::system_clock::time_point t)
+{
+ return std::chrono::system_clock::to_time_t(t);
+}
new file mode 100644
--- /dev/null
+++ b/src/libstdc++-v3/testsuite/20_util/weak_ptr/requirements/1.cc
@@ -0,0 +1,33 @@
+// { dg-do compile { target c++11 } }
+// { dg-require-effective-target hosted }
+
+#include <memory>
+#include <testsuite_tr1.h>
+
+using namespace __gnu_test;
+
+void
+test01()
+{
+ std::weak_ptr<ClassType> ptr;
+ std::weak_ptr<const ClassType> ptr2 = ptr;
+
+#if __cpp_lib_shared_ptr_arrays >= 201611L
+ std::weak_ptr<ClassType[10]> ptr_array;
+ std::weak_ptr<ClassType[]> ptr_array2 = ptr_array;
+ std::weak_ptr<ClassType const []> ptr_array3 = ptr_array;
+#endif
+}
+
+void
+test02()
+{
+ std::weak_ptr<IncompleteClass> ptr;
+ std::weak_ptr<const IncompleteClass> ptr2 = ptr;
+
+#if __cpp_lib_shared_ptr_arrays >= 201611L
+ std::weak_ptr<IncompleteClass[10]> ptr_array;
+ std::weak_ptr<IncompleteClass[]> ptr_array2 = ptr_array;
+ std::weak_ptr<IncompleteClass const []> ptr_array3 = ptr_array;
+#endif
+}
--- a/src/libstdc++-v3/testsuite/20_util/weak_ptr/requirements/explicit_instantiation/1.cc
+++ b/src/libstdc++-v3/testsuite/20_util/weak_ptr/requirements/explicit_instantiation/1.cc
@@ -28,3 +28,15 @@ template class std::weak_ptr<int>;
template class std::weak_ptr<void>;
template class std::weak_ptr<ClassType>;
template class std::weak_ptr<IncompleteClass>;
+
+#if __cpp_lib_shared_ptr_arrays >= 201611L
+template class std::weak_ptr<ClassType []>;
+template class std::weak_ptr<ClassType [42]>;
+template class std::weak_ptr<ClassType const []>;
+template class std::weak_ptr<ClassType const [42]>;
+
+template class std::weak_ptr<IncompleteClass []>;
+template class std::weak_ptr<IncompleteClass [42]>;
+template class std::weak_ptr<IncompleteClass const []>;
+template class std::weak_ptr<IncompleteClass const [42]>;
+#endif
--- a/src/libstdc++-v3/testsuite/std/format/functions/format.cc
+++ b/src/libstdc++-v3/testsuite/std/format/functions/format.cc
@@ -256,6 +256,16 @@ test_locale()
s = std::format(eloc, "{0:Le} {0:Lf} {0:Lg}", -nan);
VERIFY( s == "-nan -nan -nan" );
+ // PR libstdc++/120548 format confuses a negative sign for a thousands digit
+ s = std::format(bloc, "{:L}", -123.45);
+ VERIFY( s == "-123.45" );
+ s = std::format(bloc, "{:-L}", -876543.21);
+ VERIFY( s == "-876,543.21" );
+ s = std::format(bloc, "{:+L}", 333.22);
+ VERIFY( s == "+333.22" );
+ s = std::format(bloc, "{: L}", 999.44);
+ VERIFY( s == " 999.44" );
+
// Restore
std::locale::global(cloc);
}
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