39 lines
1.4 KiB
Diff
39 lines
1.4 KiB
Diff
From f1a423d6cfc0888638642bea1b8ed5c64770888c Mon Sep 17 00:00:00 2001
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From: Mario Limonciello <mario.limonciello@amd.com>
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Date: Mon, 28 Oct 2024 09:55:41 -0500
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Subject: cpufreq/amd-pstate: Push adjust_perf vfunc init into cpu_init
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As the driver can be changed in and out of different modes it's possible
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that adjust_perf is assigned when it shouldn't be.
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This could happen if an MSR design is started up in passive mode and then
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switches to active mode.
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To solve this explicitly clear `adjust_perf` in amd_pstate_epp_cpu_init().
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Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
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---
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drivers/cpufreq/amd-pstate.c | 4 ++--
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1 file changed, 2 insertions(+), 2 deletions(-)
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--- a/drivers/cpufreq/amd-pstate.c
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+++ b/drivers/cpufreq/amd-pstate.c
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@@ -1534,6 +1534,8 @@ static int amd_pstate_epp_cpu_init(struc
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WRITE_ONCE(cpudata->cppc_cap1_cached, value);
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}
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+ current_pstate_driver->adjust_perf = NULL;
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+
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return 0;
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free_cpudata1:
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@@ -1896,8 +1898,6 @@ static int __init amd_pstate_init(void)
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/* capability check */
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if (cpu_feature_enabled(X86_FEATURE_CPPC)) {
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pr_debug("AMD CPPC MSR based functionality is supported\n");
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- if (cppc_state != AMD_PSTATE_ACTIVE)
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- current_pstate_driver->adjust_perf = amd_pstate_adjust_perf;
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} else {
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pr_debug("AMD CPPC shared memory based functionality is supported\n");
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static_call_update(amd_pstate_cppc_enable, shmem_cppc_enable);
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