41 lines
1.7 KiB
Diff
41 lines
1.7 KiB
Diff
From 3d1a493525955678c231ab7ccf0950c0ba2b9f45 Mon Sep 17 00:00:00 2001
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From: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
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Date: Fri, 13 Jun 2025 11:42:46 +0530
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Subject: drm/i915/snps_hdmi_pll: Fix 64-bit divisor truncation by using
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div64_u64
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DIV_ROUND_CLOSEST_ULL uses do_div(), which expects a 32-bit divisor.
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When passing a 64-bit constant like CURVE2_MULTIPLIER, the value is
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silently truncated to u32, potentially leading to incorrect results
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on large divisors.
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Replace DIV_ROUND_CLOSEST_ULL with div64_u64(), which correctly
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handles full 64-bit division. Since the result is clamped between
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1 and 127, rounding is unnecessary and truncating division
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is sufficient.
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Fixes: 5947642004bf ("drm/i915/display: Add support for SNPS PHY HDMI PLL algorithm for DG2")
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Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
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Cc: Suraj Kandpal <suraj.kandpal@intel.com>
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Cc: Jani Nikula <jani.nikula@intel.com>
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Cc: <stable@vger.kernel.org> # v6.15+
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Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
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Cherry-picked-for: https://gitlab.archlinux.org/archlinux/packaging/packages/linux/-/issues/145
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---
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drivers/gpu/drm/i915/display/intel_snps_hdmi_pll.c | 4 ++--
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1 file changed, 2 insertions(+), 2 deletions(-)
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--- a/drivers/gpu/drm/i915/display/intel_snps_hdmi_pll.c
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+++ b/drivers/gpu/drm/i915/display/intel_snps_hdmi_pll.c
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@@ -103,8 +103,8 @@ static void get_ana_cp_int_prop(u64 vco_
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DIV_ROUND_DOWN_ULL(curve_1_interpolated, CURVE0_MULTIPLIER)));
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ana_cp_int_temp =
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- DIV_ROUND_CLOSEST_ULL(DIV_ROUND_DOWN_ULL(adjusted_vco_clk1, curve_2_scaled1),
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- CURVE2_MULTIPLIER);
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+ div64_u64(DIV_ROUND_DOWN_ULL(adjusted_vco_clk1, curve_2_scaled1),
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+ CURVE2_MULTIPLIER);
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*ana_cp_int = max(1, min(ana_cp_int_temp, 127));
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