69 lines
3.0 KiB
Diff
69 lines
3.0 KiB
Diff
From 024303e34931cae365cfeb28d00e3b9b704c1001 Mon Sep 17 00:00:00 2001
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From: Marek Vasut <marek.vasut+renesas@mailbox.org>
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Date: Sun, 3 Aug 2025 00:55:20 +0200
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Subject: usb: renesas-xhci: Fix External ROM access timeouts
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Increase the External ROM access timeouts to prevent failures during
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programming of External SPI EEPROM chips. The current timeouts are
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too short for some SPI EEPROMs used with uPD720201 controllers.
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The current timeout for Chip Erase in renesas_rom_erase() is 100 ms ,
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the current timeout for Sector Erase issued by the controller before
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Page Program in renesas_fw_download_image() is also 100 ms. Neither
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timeout is sufficient for e.g. the Macronix MX25L5121E or MX25V5126F.
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MX25L5121E reference manual [1] page 35 section "ERASE AND PROGRAMMING
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PERFORMANCE" and page 23 section "Table 8. AC CHARACTERISTICS (Temperature
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= 0°C to 70°C for Commercial grade, VCC = 2.7V ~ 3.6V)" row "tCE" indicate
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that the maximum time required for Chip Erase opcode to complete is 2 s,
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and for Sector Erase it is 300 ms .
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MX25V5126F reference manual [2] page 47 section "13. ERASE AND PROGRAMMING
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PERFORMANCE (2.3V - 3.6V)" and page 42 section "Table 8. AC CHARACTERISTICS
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(Temperature = -40°C to 85°C for Industrial grade, VCC = 2.3V - 3.6V)" row
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"tCE" indicate that the maximum time required for Chip Erase opcode to
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complete is 3.2 s, and for Sector Erase it is 400 ms .
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Update the timeouts such, that Chip Erase timeout is set to 5 seconds,
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and Sector Erase timeout is set to 500 ms. Such lengthy timeouts ought
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to be sufficient for majority of SPI EEPROM chips.
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[1] https://www.macronix.com/Lists/Datasheet/Attachments/8634/MX25L5121E,%203V,%20512Kb,%20v1.3.pdf
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[2] https://www.macronix.com/Lists/Datasheet/Attachments/8750/MX25V5126F,%202.5V,%20512Kb,%20v1.1.pdf
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Fixes: 2478be82de44 ("usb: renesas-xhci: Add ROM loader for uPD720201")
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Cc: stable <stable@kernel.org>
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Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
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Link: https://lore.kernel.org/r/20250802225526.25431-1-marek.vasut+renesas@mailbox.org
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Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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---
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drivers/usb/host/xhci-pci-renesas.c | 7 ++++---
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1 file changed, 4 insertions(+), 3 deletions(-)
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--- a/drivers/usb/host/xhci-pci-renesas.c
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+++ b/drivers/usb/host/xhci-pci-renesas.c
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@@ -47,8 +47,9 @@
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#define RENESAS_ROM_ERASE_MAGIC 0x5A65726F
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#define RENESAS_ROM_WRITE_MAGIC 0x53524F4D
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-#define RENESAS_RETRY 10000
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-#define RENESAS_DELAY 10
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+#define RENESAS_RETRY 50000 /* 50000 * RENESAS_DELAY ~= 500ms */
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+#define RENESAS_CHIP_ERASE_RETRY 500000 /* 500000 * RENESAS_DELAY ~= 5s */
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+#define RENESAS_DELAY 10
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#define RENESAS_FW_NAME "renesas_usb_fw.mem"
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@@ -407,7 +408,7 @@ static void renesas_rom_erase(struct pci
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/* sleep a bit while ROM is erased */
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msleep(20);
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- for (i = 0; i < RENESAS_RETRY; i++) {
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+ for (i = 0; i < RENESAS_CHIP_ERASE_RETRY; i++) {
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retval = pci_read_config_byte(pdev, RENESAS_ROM_STATUS,
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&status);
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status &= RENESAS_ROM_STATUS_ERASE;
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