49 lines
1.7 KiB
Diff
49 lines
1.7 KiB
Diff
From 33c2b6f10f140e35f44d2be9bd8dc9eb459fb29a Mon Sep 17 00:00:00 2001
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From: Mario Limonciello <mario.limonciello@amd.com>
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Date: Wed, 26 Feb 2025 01:49:21 -0600
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Subject: cpufreq/amd-pstate: Drop `cppc_cap1_cached`
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The `cppc_cap1_cached` variable isn't used at all, there is no
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need to read it at initialization for each CPU.
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Reviewed-by: Gautham R. Shenoy <gautham.shenoy@amd.com>
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Reviewed-by: Dhananjay Ugwekar <dhananjay.ugwekar@amd.com>
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Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
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---
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drivers/cpufreq/amd-pstate.c | 5 -----
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drivers/cpufreq/amd-pstate.h | 2 --
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2 files changed, 7 deletions(-)
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--- a/drivers/cpufreq/amd-pstate.c
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+++ b/drivers/cpufreq/amd-pstate.c
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@@ -1508,11 +1508,6 @@ static int amd_pstate_epp_cpu_init(struc
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if (ret)
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return ret;
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WRITE_ONCE(cpudata->cppc_req_cached, value);
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-
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- ret = rdmsrl_on_cpu(cpudata->cpu, MSR_AMD_CPPC_CAP1, &value);
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- if (ret)
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- return ret;
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- WRITE_ONCE(cpudata->cppc_cap1_cached, value);
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}
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ret = amd_pstate_set_epp(cpudata, cpudata->epp_default);
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if (ret)
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--- a/drivers/cpufreq/amd-pstate.h
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+++ b/drivers/cpufreq/amd-pstate.h
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@@ -76,7 +76,6 @@ struct amd_aperf_mperf {
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* AMD P-State driver supports preferred core featue.
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* @epp_cached: Cached CPPC energy-performance preference value
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* @policy: Cpufreq policy value
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- * @cppc_cap1_cached Cached MSR_AMD_CPPC_CAP1 register value
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*
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* The amd_cpudata is key private data for each CPU thread in AMD P-State, and
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* represents all the attributes and goals that AMD P-State requests at runtime.
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@@ -105,7 +104,6 @@ struct amd_cpudata {
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/* EPP feature related attributes*/
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u8 epp_cached;
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u32 policy;
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- u64 cppc_cap1_cached;
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bool suspended;
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u8 epp_default;
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};
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