release 6.11.11
This commit is contained in:
@@ -48,7 +48,7 @@ Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
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struct quirk_entry {
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u32 nominal_freq;
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u32 lowest_freq;
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@@ -1402,7 +1398,7 @@ static ssize_t amd_pstate_show_status(ch
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@@ -1380,7 +1376,7 @@ static ssize_t amd_pstate_show_status(ch
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return sysfs_emit(buf, "%s\n", amd_pstate_mode_string[cppc_state]);
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}
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@@ -57,7 +57,7 @@ Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
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{
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int mode_idx;
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@@ -1419,6 +1415,7 @@ static int amd_pstate_update_status(cons
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@@ -1397,6 +1393,7 @@ static int amd_pstate_update_status(cons
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return 0;
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}
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@@ -14,7 +14,7 @@ Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
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--- a/drivers/cpufreq/amd-pstate.c
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+++ b/drivers/cpufreq/amd-pstate.c
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@@ -1605,7 +1605,7 @@ static void amd_pstate_epp_cpu_exit(stru
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@@ -1583,7 +1583,7 @@ static void amd_pstate_epp_cpu_exit(stru
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pr_debug("CPU %d exiting\n", policy->cpu);
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}
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@@ -23,7 +23,7 @@ Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
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{
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struct amd_cpudata *cpudata = policy->driver_data;
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u32 max_perf, min_perf, min_limit_perf, max_limit_perf;
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@@ -1655,7 +1655,7 @@ static void amd_pstate_epp_update_limit(
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@@ -1633,7 +1633,7 @@ static void amd_pstate_epp_update_limit(
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* This return value can only be negative for shared_memory
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* systems where EPP register read/write not supported.
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*/
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@@ -32,7 +32,7 @@ Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
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}
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if (cpudata->policy == CPUFREQ_POLICY_PERFORMANCE)
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@@ -1668,12 +1668,13 @@ static void amd_pstate_epp_update_limit(
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@@ -1646,12 +1646,13 @@ static void amd_pstate_epp_update_limit(
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}
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WRITE_ONCE(cpudata->cppc_req_cached, value);
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@@ -47,7 +47,7 @@ Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
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if (!policy->cpuinfo.max_freq)
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return -ENODEV;
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@@ -1683,7 +1684,9 @@ static int amd_pstate_epp_set_policy(str
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@@ -1661,7 +1662,9 @@ static int amd_pstate_epp_set_policy(str
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cpudata->policy = policy->policy;
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@@ -42,7 +42,7 @@ Reviewed-by: Gautham R. Shenoy <gautham.sheoy@amd.com>
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+EXPORT_SYMBOL_GPL(amd_get_highest_perf);
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--- a/arch/x86/kernel/cpu/amd.c
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+++ b/arch/x86/kernel/cpu/amd.c
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@@ -1201,22 +1201,6 @@ unsigned long amd_get_dr_addr_mask(unsig
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@@ -1202,22 +1202,6 @@ unsigned long amd_get_dr_addr_mask(unsig
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}
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EXPORT_SYMBOL_GPL(amd_get_dr_addr_mask);
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@@ -60,7 +60,7 @@ Reviewed-by: Gautham R. Shenoy <gautham.sheoy@amd.com>
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* @cpu: CPU to get numerator for.
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--- a/drivers/cpufreq/amd-pstate.c
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+++ b/drivers/cpufreq/amd-pstate.c
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@@ -837,36 +837,6 @@ static void amd_pstste_sched_prefcore_wo
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@@ -815,36 +815,6 @@ static void amd_pstste_sched_prefcore_wo
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}
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static DECLARE_WORK(sched_prefcore_work, amd_pstste_sched_prefcore_workfn);
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@@ -97,7 +97,7 @@ Reviewed-by: Gautham R. Shenoy <gautham.sheoy@amd.com>
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#define CPPC_MAX_PERF U8_MAX
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static void amd_pstate_init_prefcore(struct amd_cpudata *cpudata)
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@@ -874,7 +844,7 @@ static void amd_pstate_init_prefcore(str
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@@ -852,7 +822,7 @@ static void amd_pstate_init_prefcore(str
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int ret, prio;
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u32 highest_perf;
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@@ -106,7 +106,7 @@ Reviewed-by: Gautham R. Shenoy <gautham.sheoy@amd.com>
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if (ret)
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return;
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@@ -918,7 +888,7 @@ static void amd_pstate_update_limits(uns
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@@ -896,7 +866,7 @@ static void amd_pstate_update_limits(uns
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if ((!amd_pstate_prefcore) || (!cpudata->hw_prefcore))
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goto free_cpufreq_put;
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@@ -149,7 +149,7 @@ Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
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}
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--- a/drivers/cpufreq/amd-pstate.c
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+++ b/drivers/cpufreq/amd-pstate.c
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@@ -841,32 +841,18 @@ static DECLARE_WORK(sched_prefcore_work,
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@@ -819,32 +819,18 @@ static DECLARE_WORK(sched_prefcore_work,
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static void amd_pstate_init_prefcore(struct amd_cpudata *cpudata)
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{
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@@ -185,7 +185,7 @@ Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
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schedule_work(&sched_prefcore_work);
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}
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@@ -1037,12 +1023,12 @@ static int amd_pstate_cpu_init(struct cp
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@@ -1015,12 +1001,12 @@ static int amd_pstate_cpu_init(struct cp
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cpudata->cpu = policy->cpu;
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@@ -200,7 +200,7 @@ Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
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ret = amd_pstate_init_freq(cpudata);
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if (ret)
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goto free_cpudata1;
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@@ -1503,12 +1489,12 @@ static int amd_pstate_epp_cpu_init(struc
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@@ -1481,12 +1467,12 @@ static int amd_pstate_epp_cpu_init(struc
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cpudata->cpu = policy->cpu;
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cpudata->epp_policy = 0;
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@@ -215,7 +215,7 @@ Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
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ret = amd_pstate_init_freq(cpudata);
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if (ret)
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goto free_cpudata1;
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@@ -1970,6 +1956,12 @@ static int __init amd_pstate_init(void)
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@@ -1948,6 +1934,12 @@ static int __init amd_pstate_init(void)
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static_call_update(amd_pstate_update_perf, cppc_update_perf);
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}
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@@ -143,7 +143,7 @@ Reviewed-by: Gautham R. Shenoy <gautham.sheoy@amd.com>
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WRITE_ONCE(cpudata->nominal_perf, cppc_perf.nominal_perf);
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WRITE_ONCE(cpudata->lowest_nonlinear_perf,
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cppc_perf.lowest_nonlinear_perf);
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@@ -944,8 +910,8 @@ static u32 amd_pstate_get_transition_lat
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@@ -922,8 +888,8 @@ static u32 amd_pstate_get_transition_lat
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static int amd_pstate_init_freq(struct amd_cpudata *cpudata)
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{
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int ret;
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@@ -154,7 +154,7 @@ Reviewed-by: Gautham R. Shenoy <gautham.sheoy@amd.com>
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u32 nominal_perf, nominal_freq;
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u32 lowest_nonlinear_perf, lowest_nonlinear_freq;
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u32 boost_ratio, lowest_nonlinear_ratio;
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@@ -967,8 +933,10 @@ static int amd_pstate_init_freq(struct a
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@@ -945,8 +911,10 @@ static int amd_pstate_init_freq(struct a
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nominal_perf = READ_ONCE(cpudata->nominal_perf);
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@@ -17,7 +17,7 @@ Reviewed-by: Gautham R. Shenoy <gautham.sheoy@amd.com>
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--- a/drivers/cpufreq/amd-pstate.c
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+++ b/drivers/cpufreq/amd-pstate.c
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@@ -836,17 +836,17 @@ static void amd_pstate_update_limits(uns
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@@ -814,17 +814,17 @@ static void amd_pstate_update_limits(uns
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cpudata = policy->driver_data;
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@@ -13,7 +13,7 @@ Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
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--- a/drivers/cpufreq/amd-pstate.c
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+++ b/drivers/cpufreq/amd-pstate.c
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@@ -1796,7 +1796,7 @@ static int __init amd_pstate_set_driver(
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@@ -1774,7 +1774,7 @@ static int __init amd_pstate_set_driver(
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return -EINVAL;
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}
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@@ -93,7 +93,7 @@ Signed-off-by: Dhananjay Ugwekar <Dhananjay.Ugwekar@amd.com>
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u32 min_perf, u32 des_perf,
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u32 max_perf, bool fast_switch)
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{
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@@ -1919,9 +1919,9 @@ static int __init amd_pstate_init(void)
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@@ -1897,9 +1897,9 @@ static int __init amd_pstate_init(void)
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current_pstate_driver->adjust_perf = amd_pstate_adjust_perf;
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} else {
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pr_debug("AMD CPPC shared memory based functionality is supported\n");
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@@ -33,7 +33,7 @@ Reviewed-by: Mario Limonciello <mario.limonciello@amd.com>
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--- a/drivers/cpufreq/amd-pstate.c
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+++ b/drivers/cpufreq/amd-pstate.c
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@@ -1025,13 +1025,6 @@ static int amd_pstate_cpu_init(struct cp
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@@ -1003,13 +1003,6 @@ static int amd_pstate_cpu_init(struct cp
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if (cpu_feature_enabled(X86_FEATURE_CPPC))
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policy->fast_switch_possible = true;
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@@ -47,7 +47,7 @@ Reviewed-by: Mario Limonciello <mario.limonciello@amd.com>
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ret = freq_qos_add_request(&policy->constraints, &cpudata->req[1],
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FREQ_QOS_MAX, policy->cpuinfo.max_freq);
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if (ret < 0) {
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@@ -1746,6 +1739,13 @@ static int amd_pstate_epp_resume(struct
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@@ -1724,6 +1717,13 @@ static int amd_pstate_epp_resume(struct
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return 0;
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}
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@@ -61,7 +61,7 @@ Reviewed-by: Mario Limonciello <mario.limonciello@amd.com>
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static struct cpufreq_driver amd_pstate_driver = {
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.flags = CPUFREQ_CONST_LOOPS | CPUFREQ_NEED_UPDATE_LIMITS,
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.verify = amd_pstate_verify,
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@@ -1759,6 +1759,7 @@ static struct cpufreq_driver amd_pstate_
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@@ -1737,6 +1737,7 @@ static struct cpufreq_driver amd_pstate_
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.update_limits = amd_pstate_update_limits,
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.name = "amd-pstate",
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.attr = amd_pstate_attr,
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@@ -69,7 +69,7 @@ Reviewed-by: Mario Limonciello <mario.limonciello@amd.com>
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};
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static struct cpufreq_driver amd_pstate_epp_driver = {
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@@ -1775,6 +1776,7 @@ static struct cpufreq_driver amd_pstate_
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@@ -1753,6 +1754,7 @@ static struct cpufreq_driver amd_pstate_
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.set_boost = amd_pstate_set_boost,
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.name = "amd-pstate-epp",
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.attr = amd_pstate_epp_attr,
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@@ -16,7 +16,7 @@ Reviewed-by: Mario Limonciello <mario.limonciello@amd.com>
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--- a/drivers/cpufreq/amd-pstate.c
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+++ b/drivers/cpufreq/amd-pstate.c
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@@ -726,7 +726,7 @@ static int amd_pstate_cpu_boost_update(s
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@@ -704,7 +704,7 @@ static int amd_pstate_cpu_boost_update(s
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policy->max = policy->cpuinfo.max_freq;
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if (cppc_state == AMD_PSTATE_PASSIVE) {
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@@ -25,7 +25,7 @@ Reviewed-by: Mario Limonciello <mario.limonciello@amd.com>
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if (ret < 0)
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pr_debug("Failed to update freq constraint: CPU%d\n", cpudata->cpu);
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}
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@@ -993,17 +993,17 @@ static int amd_pstate_cpu_init(struct cp
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@@ -971,17 +971,17 @@ static int amd_pstate_cpu_init(struct cp
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ret = amd_pstate_init_perf(cpudata);
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if (ret)
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@@ -46,7 +46,7 @@ Reviewed-by: Mario Limonciello <mario.limonciello@amd.com>
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min_freq = READ_ONCE(cpudata->min_freq);
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max_freq = READ_ONCE(cpudata->max_freq);
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@@ -1025,11 +1025,11 @@ static int amd_pstate_cpu_init(struct cp
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@@ -1003,11 +1003,11 @@ static int amd_pstate_cpu_init(struct cp
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if (cpu_feature_enabled(X86_FEATURE_CPPC))
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policy->fast_switch_possible = true;
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@@ -60,7 +60,7 @@ Reviewed-by: Mario Limonciello <mario.limonciello@amd.com>
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}
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cpudata->max_limit_freq = max_freq;
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@@ -1042,9 +1042,7 @@ static int amd_pstate_cpu_init(struct cp
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@@ -1020,9 +1020,7 @@ static int amd_pstate_cpu_init(struct cp
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return 0;
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@@ -71,7 +71,7 @@ Reviewed-by: Mario Limonciello <mario.limonciello@amd.com>
|
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kfree(cpudata);
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return ret;
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}
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@@ -1053,8 +1051,7 @@ static void amd_pstate_cpu_exit(struct c
|
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@@ -1031,8 +1029,7 @@ static void amd_pstate_cpu_exit(struct c
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{
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struct amd_cpudata *cpudata = policy->driver_data;
|
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|
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|
@@ -38,7 +38,7 @@ Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
|
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|
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lowest_perf = READ_ONCE(cpudata->lowest_perf);
|
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if (min_limit_perf < lowest_perf)
|
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@@ -1526,10 +1531,13 @@ static int amd_pstate_epp_update_limit(s
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@@ -1504,10 +1509,13 @@ static int amd_pstate_epp_update_limit(s
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u64 value;
|
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s16 epp;
|
||||
|
||||
|
@@ -1,55 +0,0 @@
|
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From 01ad0fb3da95867947d923596a26b18d844afe3c Mon Sep 17 00:00:00 2001
|
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From: Mario Limonciello <mario.limonciello@amd.com>
|
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Date: Sat, 12 Oct 2024 12:45:17 -0500
|
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Subject: cpufreq/amd-pstate: Don't update CPPC request in
|
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amd_pstate_cpu_boost_update()
|
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|
||||
When boost is changed the CPPC value is changed in amd_pstate_cpu_boost_update()
|
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but then changed again when refresh_frequency_limits() and all it's callbacks
|
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occur. The first is a pointless write, so instead just update the limits for
|
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the policy and let the policy refresh anchor everything properly.
|
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|
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Fixes: c8c68c38b56f ("cpufreq: amd-pstate: initialize core precision boost state")
|
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Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
|
||||
---
|
||||
drivers/cpufreq/amd-pstate.c | 24 +-----------------------
|
||||
1 file changed, 1 insertion(+), 23 deletions(-)
|
||||
|
||||
--- a/drivers/cpufreq/amd-pstate.c
|
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+++ b/drivers/cpufreq/amd-pstate.c
|
||||
@@ -695,34 +695,12 @@ static void amd_pstate_adjust_perf(unsig
|
||||
static int amd_pstate_cpu_boost_update(struct cpufreq_policy *policy, bool on)
|
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{
|
||||
struct amd_cpudata *cpudata = policy->driver_data;
|
||||
- struct cppc_perf_ctrls perf_ctrls;
|
||||
- u32 highest_perf, nominal_perf, nominal_freq, max_freq;
|
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+ u32 nominal_freq, max_freq;
|
||||
int ret = 0;
|
||||
|
||||
- highest_perf = READ_ONCE(cpudata->highest_perf);
|
||||
- nominal_perf = READ_ONCE(cpudata->nominal_perf);
|
||||
nominal_freq = READ_ONCE(cpudata->nominal_freq);
|
||||
max_freq = READ_ONCE(cpudata->max_freq);
|
||||
|
||||
- if (boot_cpu_has(X86_FEATURE_CPPC)) {
|
||||
- u64 value = READ_ONCE(cpudata->cppc_req_cached);
|
||||
-
|
||||
- value &= ~GENMASK_ULL(7, 0);
|
||||
- value |= on ? highest_perf : nominal_perf;
|
||||
- WRITE_ONCE(cpudata->cppc_req_cached, value);
|
||||
-
|
||||
- wrmsrl_on_cpu(cpudata->cpu, MSR_AMD_CPPC_REQ, value);
|
||||
- } else {
|
||||
- perf_ctrls.max_perf = on ? highest_perf : nominal_perf;
|
||||
- ret = cppc_set_perf(cpudata->cpu, &perf_ctrls);
|
||||
- if (ret) {
|
||||
- cpufreq_cpu_release(policy);
|
||||
- pr_debug("Failed to set max perf on CPU:%d. ret:%d\n",
|
||||
- cpudata->cpu, ret);
|
||||
- return ret;
|
||||
- }
|
||||
- }
|
||||
-
|
||||
if (on)
|
||||
policy->cpuinfo.max_freq = max_freq;
|
||||
else if (policy->cpuinfo.max_freq > nominal_freq * 1000)
|
@@ -1,33 +0,0 @@
|
||||
From e82b9b5a56bcac18cae68878fe67263279805735 Mon Sep 17 00:00:00 2001
|
||||
From: "Gautham R. Shenoy" <gautham.shenoy@amd.com>
|
||||
Date: Mon, 21 Oct 2024 15:48:35 +0530
|
||||
Subject: amd-pstate: Set min_perf to nominal_perf for active mode performance
|
||||
gov
|
||||
|
||||
The amd-pstate driver sets CPPC_REQ.min_perf to CPPC_REQ.max_perf when
|
||||
in active mode with performance governor. Typically CPPC_REQ.max_perf
|
||||
is set to CPPC.highest_perf. This causes frequency throttling on
|
||||
power-limited platforms which causes performance regressions on
|
||||
certain classes of workloads.
|
||||
|
||||
Hence, set the CPPC_REQ.min_perf to the CPPC.nominal_perf or
|
||||
CPPC_REQ.max_perf, whichever is lower of the two.
|
||||
|
||||
Fixes: ffa5096a7c33 ("cpufreq: amd-pstate: implement Pstate EPP support for the AMD processors")
|
||||
Signed-off-by: Gautham R. Shenoy <gautham.shenoy@amd.com>
|
||||
Reviewed-by: Mario Limonciello <mario.limonciello@amd.com>
|
||||
---
|
||||
drivers/cpufreq/amd-pstate.c | 2 +-
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
--- a/drivers/cpufreq/amd-pstate.c
|
||||
+++ b/drivers/cpufreq/amd-pstate.c
|
||||
@@ -1565,7 +1565,7 @@ static int amd_pstate_epp_update_limit(s
|
||||
value = READ_ONCE(cpudata->cppc_req_cached);
|
||||
|
||||
if (cpudata->policy == CPUFREQ_POLICY_PERFORMANCE)
|
||||
- min_perf = max_perf;
|
||||
+ min_perf = min(cpudata->nominal_perf, max_perf);
|
||||
|
||||
/* Initial min/max values for CPPC Performance Controls Register */
|
||||
value &= ~AMD_CPPC_MIN_PERF(~0L);
|
Reference in New Issue
Block a user