release 6.12.16
This commit is contained in:
@@ -75,7 +75,7 @@ Tested-by: Manali Shukla <Manali.Shukla@amd.com>
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.mmu.notify_page_enc_status_changed = paravirt_nop,
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--- a/arch/x86/xen/mmu_pv.c
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+++ b/arch/x86/xen/mmu_pv.c
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@@ -2137,7 +2137,6 @@ static const typeof(pv_ops) xen_mmu_ops
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@@ -2189,7 +2189,6 @@ static const typeof(pv_ops) xen_mmu_ops
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.flush_tlb_kernel = xen_flush_tlb,
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.flush_tlb_one_user = xen_flush_tlb_one_user,
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.flush_tlb_multi = xen_flush_tlb_multi,
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@@ -15,7 +15,7 @@ Suggested-by: Dave Hansen <dave.hansen@intel.com>
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--- a/arch/x86/mm/tlb.c
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+++ b/arch/x86/mm/tlb.c
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@@ -973,14 +973,32 @@ static struct flush_tlb_info *get_flush_
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@@ -1000,8 +1000,13 @@ static struct flush_tlb_info *get_flush_
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BUG_ON(this_cpu_inc_return(flush_tlb_info_idx) != 1);
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#endif
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@@ -31,8 +31,9 @@ Suggested-by: Dave Hansen <dave.hansen@intel.com>
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info->mm = mm;
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info->stride_shift = stride_shift;
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info->freed_tables = freed_tables;
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info->new_tlb_gen = new_tlb_gen;
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@@ -1009,6 +1014,19 @@ static struct flush_tlb_info *get_flush_
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info->initiating_cpu = smp_processor_id();
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info->trim_cpumask = 0;
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+ WARN_ONCE(start != info->start || end != info->end,
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+ "TLB flush not stride %x aligned. Start %lx, end %lx\n",
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@@ -50,7 +51,7 @@ Suggested-by: Dave Hansen <dave.hansen@intel.com>
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return info;
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}
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@@ -998,17 +1016,8 @@ void flush_tlb_mm_range(struct mm_struct
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@@ -1026,17 +1044,8 @@ void flush_tlb_mm_range(struct mm_struct
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bool freed_tables)
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{
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struct flush_tlb_info *info;
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@@ -69,7 +70,7 @@ Suggested-by: Dave Hansen <dave.hansen@intel.com>
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/* This is also a barrier that synchronizes with switch_mm(). */
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new_tlb_gen = inc_mm_tlb_gen(mm);
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@@ -1060,22 +1069,19 @@ static void do_kernel_range_flush(void *
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@@ -1089,22 +1098,19 @@ static void do_kernel_range_flush(void *
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void flush_tlb_kernel_range(unsigned long start, unsigned long end)
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{
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@@ -101,7 +102,7 @@ Suggested-by: Dave Hansen <dave.hansen@intel.com>
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}
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/*
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@@ -1247,7 +1253,7 @@ void arch_tlbbatch_flush(struct arch_tlb
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@@ -1276,7 +1282,7 @@ void arch_tlbbatch_flush(struct arch_tlb
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int cpu = get_cpu();
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@@ -15,7 +15,7 @@ Tested-by: Manali Shukla <Manali.Shukla@amd.com>
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--- a/arch/x86/mm/tlb.c
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+++ b/arch/x86/mm/tlb.c
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@@ -1057,6 +1057,30 @@ void flush_tlb_all(void)
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@@ -1086,6 +1086,30 @@ void flush_tlb_all(void)
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on_each_cpu(do_flush_tlb_all, NULL, 1);
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}
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@@ -46,7 +46,7 @@ Tested-by: Manali Shukla <Manali.Shukla@amd.com>
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static void do_kernel_range_flush(void *info)
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{
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struct flush_tlb_info *f = info;
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@@ -1076,7 +1100,9 @@ void flush_tlb_kernel_range(unsigned lon
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@@ -1105,7 +1129,9 @@ void flush_tlb_kernel_range(unsigned lon
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info = get_flush_tlb_info(NULL, start, end, PAGE_SHIFT, false,
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TLB_GENERATION_INVALID);
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@@ -14,7 +14,7 @@ Tested-by: Manali Shukla <Manali.Shukla@amd.com>
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--- a/arch/x86/mm/tlb.c
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+++ b/arch/x86/mm/tlb.c
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@@ -1045,6 +1045,19 @@ void flush_tlb_mm_range(struct mm_struct
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@@ -1074,6 +1074,19 @@ void flush_tlb_mm_range(struct mm_struct
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}
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@@ -34,7 +34,7 @@ Tested-by: Manali Shukla <Manali.Shukla@amd.com>
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static void do_flush_tlb_all(void *info)
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{
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count_vm_tlb_event(NR_TLB_REMOTE_FLUSH_RECEIVED);
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@@ -1053,6 +1066,8 @@ static void do_flush_tlb_all(void *info)
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@@ -1082,6 +1095,8 @@ static void do_flush_tlb_all(void *info)
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void flush_tlb_all(void)
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{
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@@ -17,7 +17,7 @@ Tested-by: Manali Shukla <Manali.Shukla@amd.com>
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--- a/arch/x86/mm/tlb.c
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+++ b/arch/x86/mm/tlb.c
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@@ -1301,7 +1301,9 @@ void arch_tlbbatch_flush(struct arch_tlb
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@@ -1330,7 +1330,9 @@ void arch_tlbbatch_flush(struct arch_tlb
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* a local TLB flush is needed. Optimize this use-case by calling
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* flush_tlb_func_local() directly in this case.
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*/
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@@ -22,7 +22,7 @@ Tested-by: Manali Shukla <Manali.Shukla@amd.com>
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--- a/arch/x86/include/asm/mmu.h
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+++ b/arch/x86/include/asm/mmu.h
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@@ -67,6 +67,12 @@ typedef struct {
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@@ -69,6 +69,12 @@ typedef struct {
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u16 pkey_allocation_map;
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s16 execute_only_pkey;
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#endif
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@@ -46,7 +46,7 @@ Tested-by: Manali Shukla <Manali.Shukla@amd.com>
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/*
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* Init a new mm. Used on mm copies, like at fork()
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* and on mm's that are brand-new, like at execve().
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@@ -160,6 +162,14 @@ static inline int init_new_context(struc
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@@ -161,6 +163,14 @@ static inline int init_new_context(struc
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mm->context.execute_only_pkey = -1;
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}
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#endif
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@@ -61,7 +61,7 @@ Tested-by: Manali Shukla <Manali.Shukla@amd.com>
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mm_reset_untag_mask(mm);
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init_new_context_ldt(mm);
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return 0;
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@@ -169,6 +179,10 @@ static inline int init_new_context(struc
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@@ -170,6 +180,10 @@ static inline int init_new_context(struc
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static inline void destroy_context(struct mm_struct *mm)
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{
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destroy_context_ldt(mm);
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@@ -82,7 +82,7 @@ Tested-by: Manali Shukla <Manali.Shukla@amd.com>
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#include <asm/processor.h>
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#include <asm/cpufeature.h>
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#include <asm/special_insns.h>
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@@ -238,6 +239,78 @@ void flush_tlb_one_kernel(unsigned long
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@@ -239,6 +240,78 @@ void flush_tlb_one_kernel(unsigned long
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void flush_tlb_multi(const struct cpumask *cpumask,
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const struct flush_tlb_info *info);
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@@ -578,7 +578,7 @@ Tested-by: Manali Shukla <Manali.Shukla@amd.com>
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if (unlikely(f->new_tlb_gen != TLB_GENERATION_INVALID &&
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f->new_tlb_gen <= local_tlb_gen)) {
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/*
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@@ -926,7 +1243,7 @@ STATIC_NOPV void native_flush_tlb_multi(
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@@ -953,7 +1270,7 @@ STATIC_NOPV void native_flush_tlb_multi(
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* up on the new contents of what used to be page tables, while
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* doing a speculative memory access.
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*/
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@@ -586,8 +586,8 @@ Tested-by: Manali Shukla <Manali.Shukla@amd.com>
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+ if (info->freed_tables || in_asid_transition(info->mm))
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on_each_cpu_mask(cpumask, flush_tlb_func, (void *)info, true);
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else
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on_each_cpu_cond_mask(tlb_is_not_lazy, flush_tlb_func,
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@@ -1030,8 +1347,11 @@ void flush_tlb_mm_range(struct mm_struct
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on_each_cpu_cond_mask(should_flush_tlb, flush_tlb_func,
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@@ -1058,9 +1375,12 @@ void flush_tlb_mm_range(struct mm_struct
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* a local TLB flush is needed. Optimize this use-case by calling
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* flush_tlb_func_local() directly in this case.
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*/
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@@ -595,6 +595,7 @@ Tested-by: Manali Shukla <Manali.Shukla@amd.com>
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+ if (mm_global_asid(mm)) {
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+ broadcast_tlb_flush(info);
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+ } else if (cpumask_any_but(mm_cpumask(mm), cpu) < nr_cpu_ids) {
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info->trim_cpumask = should_trim_cpumask(mm);
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flush_tlb_multi(mm_cpumask(mm), info);
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+ consider_global_asid(mm);
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} else if (mm == this_cpu_read(cpu_tlbstate.loaded_mm)) {
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@@ -90,7 +90,7 @@ Tested-by: Manali Shukla <Manali.Shukla@amd.com>
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#ifdef CONFIG_ADDRESS_MASKING
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/*
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@@ -309,6 +310,10 @@ static inline void broadcast_tlb_flush(s
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@@ -310,6 +311,10 @@ static inline void broadcast_tlb_flush(s
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static inline void consider_global_asid(struct mm_struct *mm)
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{
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}
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@@ -101,7 +101,7 @@ Tested-by: Manali Shukla <Manali.Shukla@amd.com>
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#endif
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#ifdef CONFIG_PARAVIRT
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@@ -358,21 +363,15 @@ static inline u64 inc_mm_tlb_gen(struct
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@@ -359,21 +364,15 @@ static inline u64 inc_mm_tlb_gen(struct
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return atomic64_inc_return(&mm->context.tlb_gen);
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}
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@@ -184,7 +184,7 @@ Tested-by: Manali Shukla <Manali.Shukla@amd.com>
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if (this_cpu_read(cpu_tlbstate.loaded_mm) == &init_mm)
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return;
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@@ -1621,9 +1656,7 @@ void arch_tlbbatch_flush(struct arch_tlb
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@@ -1650,9 +1685,7 @@ void arch_tlbbatch_flush(struct arch_tlb
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* a local TLB flush is needed. Optimize this use-case by calling
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* flush_tlb_func_local() directly in this case.
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*/
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@@ -195,7 +195,7 @@ Tested-by: Manali Shukla <Manali.Shukla@amd.com>
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flush_tlb_multi(&batch->cpumask, info);
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} else if (cpumask_test_cpu(cpu, &batch->cpumask)) {
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lockdep_assert_irqs_enabled();
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@@ -1632,12 +1665,53 @@ void arch_tlbbatch_flush(struct arch_tlb
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@@ -1661,12 +1694,53 @@ void arch_tlbbatch_flush(struct arch_tlb
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local_irq_enable();
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}
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@@ -65,7 +65,7 @@ Tested-by: Manali Shukla <Manali.Shukla@amd.com>
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addr += nr << info->stride_shift;
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} while (addr < info->end);
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@@ -1686,10 +1687,10 @@ void arch_tlbbatch_add_pending(struct ar
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@@ -1715,10 +1716,10 @@ void arch_tlbbatch_add_pending(struct ar
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u16 asid = mm_global_asid(mm);
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if (asid) {
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@@ -61,7 +61,7 @@ Subject: ZEN: drm/amdgpu/pm: Allow override of min_power_limit with
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--- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
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+++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
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@@ -2792,7 +2792,10 @@ int smu_get_power_limit(void *handle,
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@@ -2793,7 +2793,10 @@ int smu_get_power_limit(void *handle,
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*limit = smu->max_power_limit;
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break;
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case SMU_PPT_LIMIT_MIN:
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@@ -73,7 +73,7 @@ Subject: ZEN: drm/amdgpu/pm: Allow override of min_power_limit with
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break;
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default:
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return -EINVAL;
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@@ -2816,7 +2819,14 @@ static int smu_set_power_limit(void *han
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@@ -2817,7 +2820,14 @@ static int smu_set_power_limit(void *han
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if (smu->ppt_funcs->set_power_limit)
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return smu->ppt_funcs->set_power_limit(smu, limit_type, limit);
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