2024-12-10 06:44:25 +03:00
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From 421120bda34d994c5e0e07a89e2f9c40c53e8e87 Mon Sep 17 00:00:00 2001
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2024-10-29 05:12:06 +03:00
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From: graysky <therealgraysky AT proton DOT me>
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Date: Mon, 16 Sep 2024 05:55:58 -0400
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2024-12-10 06:44:25 +03:00
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Subject: ZEN: Add graysky's more-uarches
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2024-10-29 05:12:06 +03:00
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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From https://github.com/graysky2/kernel_compiler_patch
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2024-12-10 06:44:25 +03:00
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more-ISA-levels-and-uarches-for-kernel-6.1.79+.patch
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2024-10-29 05:12:06 +03:00
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FEATURES
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This patch adds additional tunings via new x86-64 ISA levels and
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more micro-architecture options to the Linux kernel in three classes.
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1. New generic x86-64 ISA levels
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These are selectable under:
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Processor type and features ---> x86-64 compiler ISA level
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• x86-64 A value of (1) is the default
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• x86-64-v2 A value of (2) brings support for vector
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instructions up to Streaming SIMD Extensions 4.2 (SSE4.2)
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and Supplemental Streaming SIMD Extensions 3 (SSSE3), the
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POPCNT instruction, and CMPXCHG16B.
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• x86-64-v3 A value of (3) adds vector instructions up to AVX2, MOVBE,
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and additional bit-manipulation instructions.
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There is also x86-64-v4 but including this makes little sense as
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the kernel does not use any of the AVX512 instructions anyway.
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Users of glibc 2.33 and above can see which level is supported by running:
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/lib/ld-linux-x86-64.so.2 --help | grep supported
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Or
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/lib64/ld-linux-x86-64.so.2 --help | grep supported
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2. New micro-architectures
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These are selectable under:
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Processor type and features ---> Processor family
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• AMD Improved K8-family
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• AMD K10-family
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• AMD Family 10h (Barcelona)
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• AMD Family 14h (Bobcat)
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• AMD Family 16h (Jaguar)
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• AMD Family 15h (Bulldozer)
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• AMD Family 15h (Piledriver)
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• AMD Family 15h (Steamroller)
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• AMD Family 15h (Excavator)
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• AMD Family 17h (Zen)
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• AMD Family 17h (Zen 2)
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• AMD Family 19h (Zen 3)**
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• AMD Family 19h (Zen 4)‡
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• AMD Family 1Ah (Zen 5)§
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• Intel Silvermont low-power processors
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• Intel Goldmont low-power processors (Apollo Lake and Denverton)
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• Intel Goldmont Plus low-power processors (Gemini Lake)
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• Intel 1st Gen Core i3/i5/i7 (Nehalem)
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• Intel 1.5 Gen Core i3/i5/i7 (Westmere)
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• Intel 2nd Gen Core i3/i5/i7 (Sandybridge)
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• Intel 3rd Gen Core i3/i5/i7 (Ivybridge)
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• Intel 4th Gen Core i3/i5/i7 (Haswell)
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• Intel 5th Gen Core i3/i5/i7 (Broadwell)
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• Intel 6th Gen Core i3/i5/i7 (Skylake)
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• Intel 6th Gen Core i7/i9 (Skylake X)
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• Intel 8th Gen Core i3/i5/i7 (Cannon Lake)
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• Intel 10th Gen Core i7/i9 (Ice Lake)
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• Intel Xeon (Cascade Lake)
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• Intel Xeon (Cooper Lake)*
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• Intel 3rd Gen 10nm++ i3/i5/i7/i9-family (Tiger Lake)*
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• Intel 4th Gen 10nm++ Xeon (Sapphire Rapids)†
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• Intel 11th Gen i3/i5/i7/i9-family (Rocket Lake)†
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• Intel 12th Gen i3/i5/i7/i9-family (Alder Lake)†
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• Intel 13th Gen i3/i5/i7/i9-family (Raptor Lake)‡
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• Intel 14th Gen i3/i5/i7/i9-family (Meteor Lake)‡
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• Intel 5th Gen 10nm++ Xeon (Emerald Rapids)‡
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Notes: If not otherwise noted, gcc >=9.1 is required for support.
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*Requires gcc >=10.1 or clang >=10.0
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**Required gcc >=10.3 or clang >=12.0
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†Required gcc >=11.1 or clang >=12.0
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‡Required gcc >=13.0 or clang >=15.0.5
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§Required gcc >14.0 or clang >=19.0?
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3. Auto-detected micro-architecture levels
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Compile by passing the '-march=native' option which, "selects the CPU
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to generate code for at compilation time by determining the processor type of
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the compiling machine. Using -march=native enables all instruction subsets
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supported by the local machine and will produce code optimized for the local
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machine under the constraints of the selected instruction set."[1]
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Users of Intel CPUs should select the 'Intel-Native' option and users of AMD
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CPUs should select the 'AMD-Native' option.
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MINOR NOTES RELATING TO INTEL ATOM PROCESSORS
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This patch also changes -march=atom to -march=bonnell in accordance with the
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gcc v4.9 changes. Upstream is using the deprecated -match=atom flags when I
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believe it should use the newer -march=bonnell flag for atom processors.[2]
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It is not recommended to compile on Atom-CPUs with the 'native' option.[3] The
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recommendation is to use the 'atom' option instead.
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BENEFITS
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Small but real speed increases are measurable using a make endpoint comparing
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a generic kernel to one built with one of the respective microarchs.
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See the following experimental evidence supporting this statement:
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https://github.com/graysky2/kernel_compiler_patch?tab=readme-ov-file#benchmarks
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REQUIREMENTS
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2024-12-10 06:44:25 +03:00
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linux version 6.1.79+
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2024-10-29 05:12:06 +03:00
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gcc version >=9.0 or clang version >=9.0
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ACKNOWLEDGMENTS
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This patch builds on the seminal work by Jeroen.[4]
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REFERENCES
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1. https://gcc.gnu.org/onlinedocs/gcc/x86-Options.html#index-x86-Options
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2. https://bugzilla.kernel.org/show_bug.cgi?id=77461
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3. https://github.com/graysky2/kernel_gcc_patch/issues/15
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4. http://www.linuxforge.net/docs/linux/linux-gcc.php
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---
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2024-12-10 06:44:25 +03:00
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arch/x86/Kconfig.cpu | 359 ++++++++++++++++++++++++++++++--
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arch/x86/Makefile | 87 +++++++-
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arch/x86/include/asm/vermagic.h | 70 +++++++
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3 files changed, 499 insertions(+), 17 deletions(-)
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2024-10-29 05:12:06 +03:00
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--- a/arch/x86/Kconfig.cpu
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+++ b/arch/x86/Kconfig.cpu
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@@ -155,9 +155,8 @@ config MPENTIUM4
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-Paxville
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-Dempsey
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-
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config MK6
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- bool "K6/K6-II/K6-III"
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+ bool "AMD K6/K6-II/K6-III"
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depends on X86_32
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help
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Select this for an AMD K6-family processor. Enables use of
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@@ -165,7 +164,7 @@ config MK6
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flags to GCC.
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config MK7
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- bool "Athlon/Duron/K7"
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+ bool "AMD Athlon/Duron/K7"
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depends on X86_32
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help
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Select this for an AMD Athlon K7-family processor. Enables use of
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@@ -173,12 +172,114 @@ config MK7
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flags to GCC.
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config MK8
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- bool "Opteron/Athlon64/Hammer/K8"
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+ bool "AMD Opteron/Athlon64/Hammer/K8"
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help
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Select this for an AMD Opteron or Athlon64 Hammer-family processor.
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Enables use of some extended instructions, and passes appropriate
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optimization flags to GCC.
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+config MK8SSE3
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+ bool "AMD Opteron/Athlon64/Hammer/K8 with SSE3"
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+ help
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+ Select this for improved AMD Opteron or Athlon64 Hammer-family processors.
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+ Enables use of some extended instructions, and passes appropriate
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+ optimization flags to GCC.
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+
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+config MK10
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+ bool "AMD 61xx/7x50/PhenomX3/X4/II/K10"
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+ help
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+ Select this for an AMD 61xx Eight-Core Magny-Cours, Athlon X2 7x50,
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+ Phenom X3/X4/II, Athlon II X2/X3/X4, or Turion II-family processor.
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+ Enables use of some extended instructions, and passes appropriate
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+ optimization flags to GCC.
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+
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+config MBARCELONA
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+ bool "AMD Barcelona"
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+ help
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+ Select this for AMD Family 10h Barcelona processors.
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+
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+ Enables -march=barcelona
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+
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+config MBOBCAT
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+ bool "AMD Bobcat"
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+ help
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+ Select this for AMD Family 14h Bobcat processors.
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+
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+ Enables -march=btver1
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+
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+config MJAGUAR
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+ bool "AMD Jaguar"
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+ help
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+ Select this for AMD Family 16h Jaguar processors.
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+
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+ Enables -march=btver2
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+
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+config MBULLDOZER
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+ bool "AMD Bulldozer"
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+ help
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+ Select this for AMD Family 15h Bulldozer processors.
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+
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+ Enables -march=bdver1
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+
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+config MPILEDRIVER
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+ bool "AMD Piledriver"
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+ help
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+ Select this for AMD Family 15h Piledriver processors.
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+
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+ Enables -march=bdver2
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+
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+config MSTEAMROLLER
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+ bool "AMD Steamroller"
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+ help
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+ Select this for AMD Family 15h Steamroller processors.
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+
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+ Enables -march=bdver3
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+
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+config MEXCAVATOR
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+ bool "AMD Excavator"
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+ help
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+ Select this for AMD Family 15h Excavator processors.
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+
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+ Enables -march=bdver4
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+
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+config MZEN
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+ bool "AMD Zen"
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+ help
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+ Select this for AMD Family 17h Zen processors.
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+
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+ Enables -march=znver1
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+
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+config MZEN2
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+ bool "AMD Zen 2"
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+ help
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+ Select this for AMD Family 17h Zen 2 processors.
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+
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+ Enables -march=znver2
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+
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+config MZEN3
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+ bool "AMD Zen 3"
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+ depends on (CC_IS_GCC && GCC_VERSION >= 100300) || (CC_IS_CLANG && CLANG_VERSION >= 120000)
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+ help
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+ Select this for AMD Family 19h Zen 3 processors.
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+
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+ Enables -march=znver3
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+
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+config MZEN4
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+ bool "AMD Zen 4"
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+ depends on (CC_IS_GCC && GCC_VERSION >= 130000) || (CC_IS_CLANG && CLANG_VERSION >= 160000)
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+ help
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+ Select this for AMD Family 19h Zen 4 processors.
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+
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+ Enables -march=znver4
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+
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+config MZEN5
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+ bool "AMD Zen 5"
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+ depends on (CC_IS_GCC && GCC_VERSION > 140000) || (CC_IS_CLANG && CLANG_VERSION >= 191000)
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+ help
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+ Select this for AMD Family 19h Zen 5 processors.
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+
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+ Enables -march=znver5
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+
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config MCRUSOE
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bool "Crusoe"
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depends on X86_32
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@@ -269,8 +370,17 @@ config MPSC
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using the cpu family field
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in /proc/cpuinfo. Family 15 is an older Xeon, Family 6 a newer one.
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+config MATOM
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+ bool "Intel Atom"
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+ help
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+
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+ Select this for the Intel Atom platform. Intel Atom CPUs have an
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+ in-order pipelining architecture and thus can benefit from
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+ accordingly optimized code. Use a recent GCC with specific Atom
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+ support in order to fully benefit from selecting this option.
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+
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config MCORE2
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- bool "Core 2/newer Xeon"
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+ bool "Intel Core 2"
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help
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Select this for Intel Core 2 and newer Core 2 Xeons (Xeon 51xx and
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@@ -278,14 +388,191 @@ config MCORE2
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family in /proc/cpuinfo. Newer ones have 6 and older ones 15
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(not a typo)
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-config MATOM
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- bool "Intel Atom"
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+ Enables -march=core2
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+
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+config MNEHALEM
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+ bool "Intel Nehalem"
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help
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- Select this for the Intel Atom platform. Intel Atom CPUs have an
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- in-order pipelining architecture and thus can benefit from
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- accordingly optimized code. Use a recent GCC with specific Atom
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- support in order to fully benefit from selecting this option.
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+ Select this for 1st Gen Core processors in the Nehalem family.
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+
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+ Enables -march=nehalem
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|
|
|
|
+
|
|
|
|
|
+config MWESTMERE
|
|
|
|
|
+ bool "Intel Westmere"
|
|
|
|
|
+ help
|
|
|
|
|
+
|
|
|
|
|
+ Select this for the Intel Westmere formerly Nehalem-C family.
|
|
|
|
|
+
|
|
|
|
|
+ Enables -march=westmere
|
|
|
|
|
+
|
|
|
|
|
+config MSILVERMONT
|
|
|
|
|
+ bool "Intel Silvermont"
|
|
|
|
|
+ help
|
|
|
|
|
+
|
|
|
|
|
+ Select this for the Intel Silvermont platform.
|
|
|
|
|
+
|
|
|
|
|
+ Enables -march=silvermont
|
|
|
|
|
+
|
|
|
|
|
+config MGOLDMONT
|
|
|
|
|
+ bool "Intel Goldmont"
|
|
|
|
|
+ help
|
|
|
|
|
+
|
|
|
|
|
+ Select this for the Intel Goldmont platform including Apollo Lake and Denverton.
|
|
|
|
|
+
|
|
|
|
|
+ Enables -march=goldmont
|
|
|
|
|
+
|
|
|
|
|
+config MGOLDMONTPLUS
|
|
|
|
|
+ bool "Intel Goldmont Plus"
|
|
|
|
|
+ help
|
|
|
|
|
+
|
|
|
|
|
+ Select this for the Intel Goldmont Plus platform including Gemini Lake.
|
|
|
|
|
+
|
|
|
|
|
+ Enables -march=goldmont-plus
|
|
|
|
|
+
|
|
|
|
|
+config MSANDYBRIDGE
|
|
|
|
|
+ bool "Intel Sandy Bridge"
|
|
|
|
|
+ help
|
|
|
|
|
+
|
|
|
|
|
+ Select this for 2nd Gen Core processors in the Sandy Bridge family.
|
|
|
|
|
+
|
|
|
|
|
+ Enables -march=sandybridge
|
|
|
|
|
+
|
|
|
|
|
+config MIVYBRIDGE
|
|
|
|
|
+ bool "Intel Ivy Bridge"
|
|
|
|
|
+ help
|
|
|
|
|
+
|
|
|
|
|
+ Select this for 3rd Gen Core processors in the Ivy Bridge family.
|
|
|
|
|
+
|
|
|
|
|
+ Enables -march=ivybridge
|
|
|
|
|
+
|
|
|
|
|
+config MHASWELL
|
|
|
|
|
+ bool "Intel Haswell"
|
|
|
|
|
+ help
|
|
|
|
|
+
|
|
|
|
|
+ Select this for 4th Gen Core processors in the Haswell family.
|
|
|
|
|
+
|
|
|
|
|
+ Enables -march=haswell
|
|
|
|
|
+
|
|
|
|
|
+config MBROADWELL
|
|
|
|
|
+ bool "Intel Broadwell"
|
|
|
|
|
+ help
|
|
|
|
|
+
|
|
|
|
|
+ Select this for 5th Gen Core processors in the Broadwell family.
|
|
|
|
|
+
|
|
|
|
|
+ Enables -march=broadwell
|
|
|
|
|
+
|
|
|
|
|
+config MSKYLAKE
|
|
|
|
|
+ bool "Intel Skylake"
|
|
|
|
|
+ help
|
|
|
|
|
+
|
|
|
|
|
+ Select this for 6th Gen Core processors in the Skylake family.
|
|
|
|
|
+
|
|
|
|
|
+ Enables -march=skylake
|
|
|
|
|
+
|
|
|
|
|
+config MSKYLAKEX
|
|
|
|
|
+ bool "Intel Skylake X"
|
|
|
|
|
+ help
|
|
|
|
|
+
|
|
|
|
|
+ Select this for 6th Gen Core processors in the Skylake X family.
|
|
|
|
|
+
|
|
|
|
|
+ Enables -march=skylake-avx512
|
|
|
|
|
+
|
|
|
|
|
+config MCANNONLAKE
|
|
|
|
|
+ bool "Intel Cannon Lake"
|
|
|
|
|
+ help
|
|
|
|
|
+
|
|
|
|
|
+ Select this for 8th Gen Core processors
|
|
|
|
|
+
|
|
|
|
|
+ Enables -march=cannonlake
|
|
|
|
|
+
|
|
|
|
|
+config MICELAKE
|
|
|
|
|
+ bool "Intel Ice Lake"
|
|
|
|
|
+ help
|
|
|
|
|
+
|
|
|
|
|
+ Select this for 10th Gen Core processors in the Ice Lake family.
|
|
|
|
|
+
|
|
|
|
|
+ Enables -march=icelake-client
|
|
|
|
|
+
|
|
|
|
|
+config MCASCADELAKE
|
|
|
|
|
+ bool "Intel Cascade Lake"
|
|
|
|
|
+ help
|
|
|
|
|
+
|
|
|
|
|
+ Select this for Xeon processors in the Cascade Lake family.
|
|
|
|
|
+
|
|
|
|
|
+ Enables -march=cascadelake
|
|
|
|
|
+
|
|
|
|
|
+config MCOOPERLAKE
|
|
|
|
|
+ bool "Intel Cooper Lake"
|
|
|
|
|
+ depends on (CC_IS_GCC && GCC_VERSION > 100100) || (CC_IS_CLANG && CLANG_VERSION >= 100000)
|
|
|
|
|
+ help
|
|
|
|
|
+
|
|
|
|
|
+ Select this for Xeon processors in the Cooper Lake family.
|
|
|
|
|
+
|
|
|
|
|
+ Enables -march=cooperlake
|
|
|
|
|
+
|
|
|
|
|
+config MTIGERLAKE
|
|
|
|
|
+ bool "Intel Tiger Lake"
|
|
|
|
|
+ depends on (CC_IS_GCC && GCC_VERSION > 100100) || (CC_IS_CLANG && CLANG_VERSION >= 100000)
|
|
|
|
|
+ help
|
|
|
|
|
+
|
|
|
|
|
+ Select this for third-generation 10 nm process processors in the Tiger Lake family.
|
|
|
|
|
+
|
|
|
|
|
+ Enables -march=tigerlake
|
|
|
|
|
+
|
|
|
|
|
+config MSAPPHIRERAPIDS
|
|
|
|
|
+ bool "Intel Sapphire Rapids"
|
|
|
|
|
+ depends on (CC_IS_GCC && GCC_VERSION > 110000) || (CC_IS_CLANG && CLANG_VERSION >= 120000)
|
|
|
|
|
+ help
|
|
|
|
|
+
|
|
|
|
|
+ Select this for fourth-generation 10 nm process processors in the Sapphire Rapids family.
|
|
|
|
|
+
|
|
|
|
|
+ Enables -march=sapphirerapids
|
|
|
|
|
+
|
|
|
|
|
+config MROCKETLAKE
|
|
|
|
|
+ bool "Intel Rocket Lake"
|
|
|
|
|
+ depends on (CC_IS_GCC && GCC_VERSION > 110000) || (CC_IS_CLANG && CLANG_VERSION >= 120000)
|
|
|
|
|
+ help
|
|
|
|
|
+
|
|
|
|
|
+ Select this for eleventh-generation processors in the Rocket Lake family.
|
|
|
|
|
+
|
|
|
|
|
+ Enables -march=rocketlake
|
|
|
|
|
+
|
|
|
|
|
+config MALDERLAKE
|
|
|
|
|
+ bool "Intel Alder Lake"
|
|
|
|
|
+ depends on (CC_IS_GCC && GCC_VERSION > 110000) || (CC_IS_CLANG && CLANG_VERSION >= 120000)
|
|
|
|
|
+ help
|
|
|
|
|
+
|
|
|
|
|
+ Select this for twelfth-generation processors in the Alder Lake family.
|
|
|
|
|
+
|
|
|
|
|
+ Enables -march=alderlake
|
|
|
|
|
+
|
|
|
|
|
+config MRAPTORLAKE
|
|
|
|
|
+ bool "Intel Raptor Lake"
|
|
|
|
|
+ depends on (CC_IS_GCC && GCC_VERSION >= 130000) || (CC_IS_CLANG && CLANG_VERSION >= 150500)
|
|
|
|
|
+ help
|
|
|
|
|
+
|
|
|
|
|
+ Select this for thirteenth-generation processors in the Raptor Lake family.
|
|
|
|
|
+
|
|
|
|
|
+ Enables -march=raptorlake
|
|
|
|
|
+
|
|
|
|
|
+config MMETEORLAKE
|
|
|
|
|
+ bool "Intel Meteor Lake"
|
|
|
|
|
+ depends on (CC_IS_GCC && GCC_VERSION >= 130000) || (CC_IS_CLANG && CLANG_VERSION >= 150500)
|
|
|
|
|
+ help
|
|
|
|
|
+
|
|
|
|
|
+ Select this for fourteenth-generation processors in the Meteor Lake family.
|
|
|
|
|
+
|
|
|
|
|
+ Enables -march=meteorlake
|
|
|
|
|
+
|
|
|
|
|
+config MEMERALDRAPIDS
|
|
|
|
|
+ bool "Intel Emerald Rapids"
|
|
|
|
|
+ depends on (CC_IS_GCC && GCC_VERSION > 130000) || (CC_IS_CLANG && CLANG_VERSION >= 150500)
|
|
|
|
|
+ help
|
|
|
|
|
+
|
|
|
|
|
+ Select this for fifth-generation 10 nm process processors in the Emerald Rapids family.
|
|
|
|
|
+
|
|
|
|
|
+ Enables -march=emeraldrapids
|
|
|
|
|
|
|
|
|
|
config GENERIC_CPU
|
|
|
|
|
bool "Generic-x86-64"
|
2024-12-10 06:44:25 +03:00
|
|
|
@@ -294,6 +581,26 @@ config GENERIC_CPU
|
2024-10-29 05:12:06 +03:00
|
|
|
Generic x86-64 CPU.
|
|
|
|
|
Run equally well on all x86-64 CPUs.
|
|
|
|
|
|
|
|
|
|
+config MNATIVE_INTEL
|
|
|
|
|
+ bool "Intel-Native optimizations autodetected by the compiler"
|
|
|
|
|
+ help
|
|
|
|
|
+
|
|
|
|
|
+ Clang 3.8, GCC 4.2 and above support -march=native, which automatically detects
|
|
|
|
|
+ the optimum settings to use based on your processor. Do NOT use this
|
|
|
|
|
+ for AMD CPUs. Intel Only!
|
|
|
|
|
+
|
|
|
|
|
+ Enables -march=native
|
|
|
|
|
+
|
|
|
|
|
+config MNATIVE_AMD
|
|
|
|
|
+ bool "AMD-Native optimizations autodetected by the compiler"
|
|
|
|
|
+ help
|
|
|
|
|
+
|
|
|
|
|
+ Clang 3.8, GCC 4.2 and above support -march=native, which automatically detects
|
|
|
|
|
+ the optimum settings to use based on your processor. Do NOT use this
|
|
|
|
|
+ for Intel CPUs. AMD Only!
|
|
|
|
|
+
|
|
|
|
|
+ Enables -march=native
|
|
|
|
|
+
|
|
|
|
|
endchoice
|
|
|
|
|
|
|
|
|
|
config X86_GENERIC
|
2024-12-10 06:44:25 +03:00
|
|
|
@@ -308,6 +615,30 @@ config X86_GENERIC
|
2024-10-29 05:12:06 +03:00
|
|
|
This is really intended for distributors who need more
|
|
|
|
|
generic optimizations.
|
|
|
|
|
|
|
|
|
|
+config X86_64_VERSION
|
|
|
|
|
+ int "x86-64 compiler ISA level"
|
|
|
|
|
+ range 1 3
|
|
|
|
|
+ depends on (CC_IS_GCC && GCC_VERSION > 110000) || (CC_IS_CLANG && CLANG_VERSION >= 120000)
|
|
|
|
|
+ depends on X86_64 && GENERIC_CPU
|
|
|
|
|
+ help
|
|
|
|
|
+ Specify a specific x86-64 compiler ISA level.
|
|
|
|
|
+
|
|
|
|
|
+ There are three x86-64 ISA levels that work on top of
|
|
|
|
|
+ the x86-64 baseline, namely: x86-64-v2, x86-64-v3, and x86-64-v4.
|
|
|
|
|
+
|
|
|
|
|
+ x86-64-v2 brings support for vector instructions up to Streaming SIMD
|
|
|
|
|
+ Extensions 4.2 (SSE4.2) and Supplemental Streaming SIMD Extensions 3
|
|
|
|
|
+ (SSSE3), the POPCNT instruction, and CMPXCHG16B.
|
|
|
|
|
+
|
|
|
|
|
+ x86-64-v3 adds vector instructions up to AVX2, MOVBE, and additional
|
|
|
|
|
+ bit-manipulation instructions.
|
|
|
|
|
+
|
|
|
|
|
+ x86-64-v4 is not included since the kernel does not use AVX512 instructions
|
|
|
|
|
+
|
|
|
|
|
+ You can find the best version for your CPU by running one of the following:
|
|
|
|
|
+ /lib/ld-linux-x86-64.so.2 --help | grep supported
|
|
|
|
|
+ /lib64/ld-linux-x86-64.so.2 --help | grep supported
|
|
|
|
|
+
|
|
|
|
|
#
|
|
|
|
|
# Define implied options from the CPU selection here
|
|
|
|
|
config X86_INTERNODE_CACHE_SHIFT
|
2024-12-10 06:44:25 +03:00
|
|
|
@@ -318,7 +649,7 @@ config X86_INTERNODE_CACHE_SHIFT
|
2024-10-29 05:12:06 +03:00
|
|
|
config X86_L1_CACHE_SHIFT
|
|
|
|
|
int
|
|
|
|
|
default "7" if MPENTIUM4 || MPSC
|
|
|
|
|
- default "6" if MK7 || MK8 || MPENTIUMM || MCORE2 || MATOM || MVIAC7 || X86_GENERIC || GENERIC_CPU
|
|
|
|
|
+ default "6" if MK7 || MK8 || MPENTIUMM || MCORE2 || MATOM || MVIAC7 || X86_GENERIC || GENERIC_CPU || MK8SSE3 || MK10 || MBARCELONA || MBOBCAT || MJAGUAR || MBULLDOZER || MPILEDRIVER || MSTEAMROLLER || MEXCAVATOR || MZEN || MZEN2 || MZEN3 || MZEN4 || MZEN5 || MNEHALEM || MWESTMERE || MSILVERMONT || MGOLDMONT || MGOLDMONTPLUS || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MCANNONLAKE || MICELAKE || MCASCADELAKE || MCOOPERLAKE || MTIGERLAKE || MSAPPHIRERAPIDS || MROCKETLAKE || MALDERLAKE || MRAPTORLAKE || MMETEORLAKE || MEMERALDRAPIDS || MNATIVE_INTEL || MNATIVE_AMD
|
|
|
|
|
default "4" if MELAN || M486SX || M486 || MGEODEGX1
|
|
|
|
|
default "5" if MWINCHIP3D || MWINCHIPC6 || MCRUSOE || MEFFICEON || MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODE_LX
|
|
|
|
|
|
2024-12-10 06:44:25 +03:00
|
|
|
@@ -336,11 +667,11 @@ config X86_ALIGNMENT_16
|
2024-10-29 05:12:06 +03:00
|
|
|
|
|
|
|
|
config X86_INTEL_USERCOPY
|
|
|
|
|
def_bool y
|
|
|
|
|
- depends on MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M586MMX || X86_GENERIC || MK8 || MK7 || MEFFICEON || MCORE2
|
|
|
|
|
+ depends on MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M586MMX || X86_GENERIC || MK8 || MK7 || MEFFICEON || MCORE2 || MNEHALEM || MWESTMERE || MSILVERMONT || MGOLDMONT || MGOLDMONTPLUS || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MCANNONLAKE || MICELAKE || MCASCADELAKE || MCOOPERLAKE || MTIGERLAKE || MSAPPHIRERAPIDS || MROCKETLAKE || MALDERLAKE || MRAPTORLAKE || MMETEORLAKE || MEMERALDRAPIDS || MNATIVE_INTEL
|
|
|
|
|
|
|
|
|
|
config X86_USE_PPRO_CHECKSUM
|
|
|
|
|
def_bool y
|
|
|
|
|
- depends on MWINCHIP3D || MWINCHIPC6 || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MK8 || MVIAC3_2 || MVIAC7 || MEFFICEON || MGEODE_LX || MCORE2 || MATOM
|
|
|
|
|
+ depends on MWINCHIP3D || MWINCHIPC6 || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MK8 || MVIAC3_2 || MVIAC7 || MEFFICEON || MGEODE_LX || MCORE2 || MATOM || MK8SSE3 || MK10 || MBARCELONA || MBOBCAT || MJAGUAR || MBULLDOZER || MPILEDRIVER || MSTEAMROLLER || MEXCAVATOR || MZEN || MZEN2 || MZEN3 || MZEN4 || MZEN5 || MNEHALEM || MWESTMERE || MSILVERMONT || MGOLDMONT || MGOLDMONTPLUS || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MCANNONLAKE || MICELAKE || MCASCADELAKE || MCOOPERLAKE || MTIGERLAKE || MSAPPHIRERAPIDS || MROCKETLAKE || MALDERLAKE || MRAPTORLAKE || MMETEORLAKE || MEMERALDRAPIDS || MNATIVE_INTEL || MNATIVE_AMD
|
|
|
|
|
|
|
|
|
|
#
|
|
|
|
|
# P6_NOPs are a relatively minor optimization that require a family >=
|
|
|
|
|
--- a/arch/x86/Makefile
|
|
|
|
|
+++ b/arch/x86/Makefile
|
2024-12-10 06:44:25 +03:00
|
|
|
@@ -182,15 +182,96 @@ else
|
|
|
|
|
cflags-$(CONFIG_MK8) += -march=k8
|
2024-10-29 05:12:06 +03:00
|
|
|
cflags-$(CONFIG_MPSC) += -march=nocona
|
|
|
|
|
cflags-$(CONFIG_MCORE2) += -march=core2
|
2024-12-10 06:44:25 +03:00
|
|
|
- cflags-$(CONFIG_MATOM) += -march=atom
|
2024-10-29 05:12:06 +03:00
|
|
|
- cflags-$(CONFIG_GENERIC_CPU) += -mtune=generic
|
2024-12-10 06:44:25 +03:00
|
|
|
+ cflags-$(CONFIG_MATOM) += -march=bonnell
|
2024-10-29 05:12:06 +03:00
|
|
|
+ ifeq ($(CONFIG_X86_64_VERSION),1)
|
|
|
|
|
+ cflags-$(CONFIG_GENERIC_CPU) += -mtune=generic
|
|
|
|
|
+ rustflags-$(CONFIG_GENERIC_CPU) += -Ztune-cpu=generic
|
|
|
|
|
+ else
|
|
|
|
|
+ cflags-$(CONFIG_GENERIC_CPU) += -march=x86-64-v$(CONFIG_X86_64_VERSION)
|
|
|
|
|
+ rustflags-$(CONFIG_GENERIC_CPU) += -Ctarget-cpu=x86-64-v$(CONFIG_X86_64_VERSION)
|
|
|
|
|
+ endif
|
|
|
|
|
+ cflags-$(CONFIG_MK8SSE3) += -march=k8-sse3
|
|
|
|
|
+ cflags-$(CONFIG_MK10) += -march=amdfam10
|
|
|
|
|
+ cflags-$(CONFIG_MBARCELONA) += -march=barcelona
|
|
|
|
|
+ cflags-$(CONFIG_MBOBCAT) += -march=btver1
|
|
|
|
|
+ cflags-$(CONFIG_MJAGUAR) += -march=btver2
|
|
|
|
|
+ cflags-$(CONFIG_MBULLDOZER) += -march=bdver1
|
|
|
|
|
+ cflags-$(CONFIG_MPILEDRIVER) += -march=bdver2 -mno-tbm
|
|
|
|
|
+ cflags-$(CONFIG_MSTEAMROLLER) += -march=bdver3 -mno-tbm
|
|
|
|
|
+ cflags-$(CONFIG_MEXCAVATOR) += -march=bdver4 -mno-tbm
|
|
|
|
|
+ cflags-$(CONFIG_MZEN) += -march=znver1
|
|
|
|
|
+ cflags-$(CONFIG_MZEN2) += -march=znver2
|
|
|
|
|
+ cflags-$(CONFIG_MZEN3) += -march=znver3
|
|
|
|
|
+ cflags-$(CONFIG_MZEN4) += -march=znver4
|
|
|
|
|
+ cflags-$(CONFIG_MZEN5) += -march=znver5
|
|
|
|
|
+ cflags-$(CONFIG_MNATIVE_INTEL) += -march=native
|
|
|
|
|
+ cflags-$(CONFIG_MNATIVE_AMD) += -march=native -mno-tbm
|
|
|
|
|
+ cflags-$(CONFIG_MNEHALEM) += -march=nehalem
|
|
|
|
|
+ cflags-$(CONFIG_MWESTMERE) += -march=westmere
|
|
|
|
|
+ cflags-$(CONFIG_MSILVERMONT) += -march=silvermont
|
|
|
|
|
+ cflags-$(CONFIG_MGOLDMONT) += -march=goldmont
|
|
|
|
|
+ cflags-$(CONFIG_MGOLDMONTPLUS) += -march=goldmont-plus
|
|
|
|
|
+ cflags-$(CONFIG_MSANDYBRIDGE) += -march=sandybridge
|
|
|
|
|
+ cflags-$(CONFIG_MIVYBRIDGE) += -march=ivybridge
|
|
|
|
|
+ cflags-$(CONFIG_MHASWELL) += -march=haswell
|
|
|
|
|
+ cflags-$(CONFIG_MBROADWELL) += -march=broadwell
|
|
|
|
|
+ cflags-$(CONFIG_MSKYLAKE) += -march=skylake
|
|
|
|
|
+ cflags-$(CONFIG_MSKYLAKEX) += -march=skylake-avx512
|
|
|
|
|
+ cflags-$(CONFIG_MCANNONLAKE) += -march=cannonlake
|
|
|
|
|
+ cflags-$(CONFIG_MICELAKE) += -march=icelake-client
|
|
|
|
|
+ cflags-$(CONFIG_MCASCADELAKE) += -march=cascadelake
|
|
|
|
|
+ cflags-$(CONFIG_MCOOPERLAKE) += -march=cooperlake
|
|
|
|
|
+ cflags-$(CONFIG_MTIGERLAKE) += -march=tigerlake
|
|
|
|
|
+ cflags-$(CONFIG_MSAPPHIRERAPIDS) += -march=sapphirerapids
|
|
|
|
|
+ cflags-$(CONFIG_MROCKETLAKE) += -march=rocketlake
|
|
|
|
|
+ cflags-$(CONFIG_MALDERLAKE) += -march=alderlake
|
|
|
|
|
+ cflags-$(CONFIG_MRAPTORLAKE) += -march=raptorlake
|
|
|
|
|
+ cflags-$(CONFIG_MMETEORLAKE) += -march=meteorlake
|
|
|
|
|
+ cflags-$(CONFIG_MEMERALDRAPIDS) += -march=emeraldrapids
|
|
|
|
|
KBUILD_CFLAGS += $(cflags-y)
|
|
|
|
|
|
|
|
|
|
rustflags-$(CONFIG_MK8) += -Ctarget-cpu=k8
|
|
|
|
|
rustflags-$(CONFIG_MPSC) += -Ctarget-cpu=nocona
|
|
|
|
|
rustflags-$(CONFIG_MCORE2) += -Ctarget-cpu=core2
|
|
|
|
|
rustflags-$(CONFIG_MATOM) += -Ctarget-cpu=atom
|
|
|
|
|
- rustflags-$(CONFIG_GENERIC_CPU) += -Ztune-cpu=generic
|
|
|
|
|
+ rustflags-$(CONFIG_MK8SSE3) += -Ctarget-cpu=k8-sse3
|
|
|
|
|
+ rustflags-$(CONFIG_MK10) += -Ctarget-cpu=amdfam10
|
|
|
|
|
+ rustflags-$(CONFIG_MBARCELONA) += -Ctarget-cpu=barcelona
|
|
|
|
|
+ rustflags-$(CONFIG_MBOBCAT) += -Ctarget-cpu=btver1
|
|
|
|
|
+ rustflags-$(CONFIG_MJAGUAR) += -Ctarget-cpu=btver2
|
|
|
|
|
+ rustflags-$(CONFIG_MBULLDOZER) += -Ctarget-cpu=bdver1
|
|
|
|
|
+ rustflags-$(CONFIG_MPILEDRIVER) += -Ctarget-cpu=bdver2
|
|
|
|
|
+ rustflags-$(CONFIG_MSTEAMROLLER) += -Ctarget-cpu=bdver3
|
|
|
|
|
+ rustflags-$(CONFIG_MEXCAVATOR) += -Ctarget-cpu=bdver4
|
|
|
|
|
+ rustflags-$(CONFIG_MZEN) += -Ctarget-cpu=znver1
|
|
|
|
|
+ rustflags-$(CONFIG_MZEN2) += -Ctarget-cpu=znver2
|
|
|
|
|
+ rustflags-$(CONFIG_MZEN3) += -Ctarget-cpu=znver3
|
|
|
|
|
+ rustflags-$(CONFIG_MZEN4) += -Ctarget-cpu=znver4
|
|
|
|
|
+ rustflags-$(CONFIG_MZEN5) += -Ctarget-cpu=znver5
|
|
|
|
|
+ rustflags-$(CONFIG_MNATIVE_INTEL) += -Ctarget-cpu=native
|
|
|
|
|
+ rustflags-$(CONFIG_MNATIVE_AMD) += -Ctarget-cpu=native
|
|
|
|
|
+ rustflags-$(CONFIG_MNEHALEM) += -Ctarget-cpu=nehalem
|
|
|
|
|
+ rustflags-$(CONFIG_MWESTMERE) += -Ctarget-cpu=westmere
|
|
|
|
|
+ rustflags-$(CONFIG_MSILVERMONT) += -Ctarget-cpu=silvermont
|
|
|
|
|
+ rustflags-$(CONFIG_MGOLDMONT) += -Ctarget-cpu=goldmont
|
|
|
|
|
+ rustflags-$(CONFIG_MGOLDMONTPLUS) += -Ctarget-cpu=goldmont-plus
|
|
|
|
|
+ rustflags-$(CONFIG_MSANDYBRIDGE) += -Ctarget-cpu=sandybridge
|
|
|
|
|
+ rustflags-$(CONFIG_MIVYBRIDGE) += -Ctarget-cpu=ivybridge
|
|
|
|
|
+ rustflags-$(CONFIG_MHASWELL) += -Ctarget-cpu=haswell
|
|
|
|
|
+ rustflags-$(CONFIG_MBROADWELL) += -Ctarget-cpu=broadwell
|
|
|
|
|
+ rustflags-$(CONFIG_MSKYLAKE) += -Ctarget-cpu=skylake
|
|
|
|
|
+ rustflags-$(CONFIG_MSKYLAKEX) += -Ctarget-cpu=skylake-avx512
|
|
|
|
|
+ rustflags-$(CONFIG_MCANNONLAKE) += -Ctarget-cpu=cannonlake
|
|
|
|
|
+ rustflags-$(CONFIG_MICELAKE) += -Ctarget-cpu=icelake-client
|
|
|
|
|
+ rustflags-$(CONFIG_MCASCADELAKE) += -Ctarget-cpu=cascadelake
|
|
|
|
|
+ rustflags-$(CONFIG_MCOOPERLAKE) += -Ctarget-cpu=cooperlake
|
|
|
|
|
+ rustflags-$(CONFIG_MTIGERLAKE) += -Ctarget-cpu=tigerlake
|
|
|
|
|
+ rustflags-$(CONFIG_MSAPPHIRERAPIDS) += -Ctarget-cpu=sapphirerapids
|
|
|
|
|
+ rustflags-$(CONFIG_MROCKETLAKE) += -Ctarget-cpu=rocketlake
|
|
|
|
|
+ rustflags-$(CONFIG_MALDERLAKE) += -Ctarget-cpu=alderlake
|
|
|
|
|
+ rustflags-$(CONFIG_MRAPTORLAKE) += -Ctarget-cpu=raptorlake
|
|
|
|
|
+ rustflags-$(CONFIG_MMETEORLAKE) += -Ctarget-cpu=meteorlake
|
|
|
|
|
+ rustflags-$(CONFIG_MEMERALDRAPIDS) += -Ctarget-cpu=emeraldrapids
|
|
|
|
|
KBUILD_RUSTFLAGS += $(rustflags-y)
|
|
|
|
|
|
|
|
|
|
KBUILD_CFLAGS += -mno-red-zone
|
|
|
|
|
--- a/arch/x86/include/asm/vermagic.h
|
|
|
|
|
+++ b/arch/x86/include/asm/vermagic.h
|
|
|
|
|
@@ -17,6 +17,54 @@
|
|
|
|
|
#define MODULE_PROC_FAMILY "586MMX "
|
|
|
|
|
#elif defined CONFIG_MCORE2
|
|
|
|
|
#define MODULE_PROC_FAMILY "CORE2 "
|
|
|
|
|
+#elif defined CONFIG_MNATIVE_INTEL
|
|
|
|
|
+#define MODULE_PROC_FAMILY "NATIVE_INTEL "
|
|
|
|
|
+#elif defined CONFIG_MNATIVE_AMD
|
|
|
|
|
+#define MODULE_PROC_FAMILY "NATIVE_AMD "
|
|
|
|
|
+#elif defined CONFIG_MNEHALEM
|
|
|
|
|
+#define MODULE_PROC_FAMILY "NEHALEM "
|
|
|
|
|
+#elif defined CONFIG_MWESTMERE
|
|
|
|
|
+#define MODULE_PROC_FAMILY "WESTMERE "
|
|
|
|
|
+#elif defined CONFIG_MSILVERMONT
|
|
|
|
|
+#define MODULE_PROC_FAMILY "SILVERMONT "
|
|
|
|
|
+#elif defined CONFIG_MGOLDMONT
|
|
|
|
|
+#define MODULE_PROC_FAMILY "GOLDMONT "
|
|
|
|
|
+#elif defined CONFIG_MGOLDMONTPLUS
|
|
|
|
|
+#define MODULE_PROC_FAMILY "GOLDMONTPLUS "
|
|
|
|
|
+#elif defined CONFIG_MSANDYBRIDGE
|
|
|
|
|
+#define MODULE_PROC_FAMILY "SANDYBRIDGE "
|
|
|
|
|
+#elif defined CONFIG_MIVYBRIDGE
|
|
|
|
|
+#define MODULE_PROC_FAMILY "IVYBRIDGE "
|
|
|
|
|
+#elif defined CONFIG_MHASWELL
|
|
|
|
|
+#define MODULE_PROC_FAMILY "HASWELL "
|
|
|
|
|
+#elif defined CONFIG_MBROADWELL
|
|
|
|
|
+#define MODULE_PROC_FAMILY "BROADWELL "
|
|
|
|
|
+#elif defined CONFIG_MSKYLAKE
|
|
|
|
|
+#define MODULE_PROC_FAMILY "SKYLAKE "
|
|
|
|
|
+#elif defined CONFIG_MSKYLAKEX
|
|
|
|
|
+#define MODULE_PROC_FAMILY "SKYLAKEX "
|
|
|
|
|
+#elif defined CONFIG_MCANNONLAKE
|
|
|
|
|
+#define MODULE_PROC_FAMILY "CANNONLAKE "
|
|
|
|
|
+#elif defined CONFIG_MICELAKE
|
|
|
|
|
+#define MODULE_PROC_FAMILY "ICELAKE "
|
|
|
|
|
+#elif defined CONFIG_MCASCADELAKE
|
|
|
|
|
+#define MODULE_PROC_FAMILY "CASCADELAKE "
|
|
|
|
|
+#elif defined CONFIG_MCOOPERLAKE
|
|
|
|
|
+#define MODULE_PROC_FAMILY "COOPERLAKE "
|
|
|
|
|
+#elif defined CONFIG_MTIGERLAKE
|
|
|
|
|
+#define MODULE_PROC_FAMILY "TIGERLAKE "
|
|
|
|
|
+#elif defined CONFIG_MSAPPHIRERAPIDS
|
|
|
|
|
+#define MODULE_PROC_FAMILY "SAPPHIRERAPIDS "
|
|
|
|
|
+#elif defined CONFIG_ROCKETLAKE
|
|
|
|
|
+#define MODULE_PROC_FAMILY "ROCKETLAKE "
|
|
|
|
|
+#elif defined CONFIG_MALDERLAKE
|
|
|
|
|
+#define MODULE_PROC_FAMILY "ALDERLAKE "
|
|
|
|
|
+#elif defined CONFIG_MRAPTORLAKE
|
|
|
|
|
+#define MODULE_PROC_FAMILY "RAPTORLAKE "
|
|
|
|
|
+#elif defined CONFIG_MMETEORLAKE
|
|
|
|
|
+#define MODULE_PROC_FAMILY "METEORLAKE "
|
|
|
|
|
+#elif defined CONFIG_MEMERALDRAPIDS
|
|
|
|
|
+#define MODULE_PROC_FAMILY "EMERALDRAPIDS "
|
|
|
|
|
#elif defined CONFIG_MATOM
|
|
|
|
|
#define MODULE_PROC_FAMILY "ATOM "
|
|
|
|
|
#elif defined CONFIG_M686
|
|
|
|
|
@@ -35,6 +83,28 @@
|
|
|
|
|
#define MODULE_PROC_FAMILY "K7 "
|
|
|
|
|
#elif defined CONFIG_MK8
|
|
|
|
|
#define MODULE_PROC_FAMILY "K8 "
|
|
|
|
|
+#elif defined CONFIG_MK8SSE3
|
|
|
|
|
+#define MODULE_PROC_FAMILY "K8SSE3 "
|
|
|
|
|
+#elif defined CONFIG_MK10
|
|
|
|
|
+#define MODULE_PROC_FAMILY "K10 "
|
|
|
|
|
+#elif defined CONFIG_MBARCELONA
|
|
|
|
|
+#define MODULE_PROC_FAMILY "BARCELONA "
|
|
|
|
|
+#elif defined CONFIG_MBOBCAT
|
|
|
|
|
+#define MODULE_PROC_FAMILY "BOBCAT "
|
|
|
|
|
+#elif defined CONFIG_MBULLDOZER
|
|
|
|
|
+#define MODULE_PROC_FAMILY "BULLDOZER "
|
|
|
|
|
+#elif defined CONFIG_MPILEDRIVER
|
|
|
|
|
+#define MODULE_PROC_FAMILY "PILEDRIVER "
|
|
|
|
|
+#elif defined CONFIG_MSTEAMROLLER
|
|
|
|
|
+#define MODULE_PROC_FAMILY "STEAMROLLER "
|
|
|
|
|
+#elif defined CONFIG_MJAGUAR
|
|
|
|
|
+#define MODULE_PROC_FAMILY "JAGUAR "
|
|
|
|
|
+#elif defined CONFIG_MEXCAVATOR
|
|
|
|
|
+#define MODULE_PROC_FAMILY "EXCAVATOR "
|
|
|
|
|
+#elif defined CONFIG_MZEN
|
|
|
|
|
+#define MODULE_PROC_FAMILY "ZEN "
|
|
|
|
|
+#elif defined CONFIG_MZEN2
|
|
|
|
|
+#define MODULE_PROC_FAMILY "ZEN2 "
|
|
|
|
|
#elif defined CONFIG_MELAN
|
|
|
|
|
#define MODULE_PROC_FAMILY "ELAN "
|
|
|
|
|
#elif defined CONFIG_MCRUSOE
|
