44 lines
1.7 KiB
Diff
44 lines
1.7 KiB
Diff
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From 34ef29430b9a217ef0811f218b8f86c631d6c574 Mon Sep 17 00:00:00 2001
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From: Perry Yuan <perry.yuan@amd.com>
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Date: Fri, 25 Oct 2024 12:14:56 -0500
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Subject: x86/cpufeatures: Add feature bits for AMD heterogeneous processor
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CPUID leaf 0x80000026 advertises core types with different efficiency
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rankings.
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Bit 30 indicates the heterogeneous core topology feature, if the bit
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set, it means not all instances at the current hierarchical level have
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the same core topology.
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This is described in the AMD64 Architecture Programmers Manual Volume
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2 and 3, doc ID #25493 and #25494.
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Signed-off-by: Perry Yuan <perry.yuan@amd.com>
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Co-developed-by: Mario Limonciello <mario.limonciello@amd.com>
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Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
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---
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arch/x86/include/asm/cpufeatures.h | 1 +
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arch/x86/kernel/cpu/scattered.c | 1 +
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2 files changed, 2 insertions(+)
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--- a/arch/x86/include/asm/cpufeatures.h
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+++ b/arch/x86/include/asm/cpufeatures.h
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@@ -474,6 +474,7 @@
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#define X86_FEATURE_CLEAR_BHB_HW (21*32+ 3) /* BHI_DIS_S HW control enabled */
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#define X86_FEATURE_CLEAR_BHB_LOOP_ON_VMEXIT (21*32+ 4) /* Clear branch history at vmexit using SW loop */
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#define X86_FEATURE_AMD_FAST_CPPC (21*32 + 5) /* Fast CPPC */
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+#define X86_FEATURE_AMD_HETEROGENEOUS_CORES (21*32 + 6) /* Heterogeneous Core Topology */
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/*
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* BUG word(s)
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--- a/arch/x86/kernel/cpu/scattered.c
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+++ b/arch/x86/kernel/cpu/scattered.c
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@@ -52,6 +52,7 @@ static const struct cpuid_bit cpuid_bits
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{ X86_FEATURE_PERFMON_V2, CPUID_EAX, 0, 0x80000022, 0 },
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{ X86_FEATURE_AMD_LBR_V2, CPUID_EAX, 1, 0x80000022, 0 },
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{ X86_FEATURE_AMD_LBR_PMC_FREEZE, CPUID_EAX, 2, 0x80000022, 0 },
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+ { X86_FEATURE_AMD_HETEROGENEOUS_CORES, CPUID_EAX, 30, 0x80000026, 0 },
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{ 0, 0, 0, 0, 0 }
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};
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